https://bugzilla.kernel.org/show_bug.cgi?id=100871
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--- Comment #4 from Charles R. Anderson ---
(In reply to Charles R. Anderson from comment #3)
> radeon.audio=0 indeed works around the problem.
This problem still exists in 4.2.3 as released in Fedora 22
(kernel-4.2.3-200.fc22). I still need th
Hi Shashank,
[auto build test WARNING on drm-intel/for-linux-next -- if it's inappropriate
base, please suggest rules for selecting the more suitable base]
url:
https://github.com/0day-ci/linux/commits/Shashank-Sharma/Color-Management-for-DRM-framework/20151020-202959
reproduce:
2015-10-20 21:53 GMT+09:00 Andrzej Hajda :
> On 10/20/2015 02:30 PM, Krzysztof Kozlowski wrote:
>> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>>> DECON-TV(Display and Enhancement Controller for TV) is a variation
>>> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>>>
>>>
2015-10-20 21:41 GMT+09:00 Andrzej Hajda :
> On 10/20/2015 02:24 PM, Krzysztof Kozlowski wrote:
>> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>>> DECON IP requires this clock to access configuration registers.
>>>
>>> Signed-off-by: Andrzej Hajda
>>> ---
>>> Documentation/devicetree/bindings
W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
> DECON-TV(Display and Enhancement Controller for TV) is a variation
> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>
> Signed-off-by: Andrzej Hajda
> ---
> .../devicetree/bindings/video/exynos5433-decon.txt | 21
> ++
W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
> DECON IP requires this clock to access configuration registers.
>
> Signed-off-by: Andrzej Hajda
> ---
> Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/Docume
2015-10-20 18:22 GMT+09:00 Andrzej Hajda :
> Hi Inki,
>
> This patchset adds support to DECON-TV in Exynos5433 SoC.
> The main patch is prepended with few preparation patches:
> - add three clocks required by HDMI pipeline,
> - small bindings update,
> - driver cleanup.
>
> The patchset is based on
2015-10-20 18:22 GMT+09:00 Andrzej Hajda :
> This undocumented gate clock is used by DECON IP.
>
> Signed-off-by: Andrzej Hajda
> ---
> drivers/clk/samsung/clk-exynos5433.c | 2 ++
> include/dt-bindings/clock/exynos5433.h | 4 +++-
> 2 files changed, 5 insertions(+), 1 deletion(-)
>
Indeed loo
On Fri, Oct 16, 2015 at 10:43 AM, Peter Zijlstra
wrote:
> On Tue, Sep 29, 2015 at 03:39:03PM +0100, Robert Bragg wrote:
>> - We're bridging two complex architectures
>>
>> To review this work I think it will be relevant to have a good
>> general familiarity with Gen graphics (e.g. thinkin
2015-10-20 18:19 GMT+09:00 Andrzej Hajda :
> Hi Krzysztof,
>
>
> On 10/12/2015 03:26 PM, Inki Dae wrote:
>> Hi Andrzej,
>>
>> For all patches, merged excepting patch 2 which cleans up dt binding
>> document.
>
> Could you take this patch [1], it is just small binding cleanup.
>
> [1]: https://patch
e bug.
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what's being modified is DT
parsing code.
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On Tue, Oct 20, 2015 at 01:15:08PM +0200, Christian König wrote:
> On 18.10.2015 13:05, Lukas Wunner wrote:
> >vga_switcheroo_client_ops has always been declared const since its
> >introduction with 26ec685ff9d9 ("vga_switcheroo: Introduce struct
> >vga_switcheroo_client_ops").
> >
> >Do so for vg
Hi Javier,
On 10/20/2015 05:48 PM, Javier Martinez Canillas wrote:
> Hello Yakir,
>
> On 10/20/2015 04:10 AM, Yakir Yang wrote:
>> Hi Javier,
>>
>> On 10/19/2015 06:40 PM, Javier Martinez Canillas wrote:
>>> Hello Yakir,
>>>
>>> On 10/10/2015 05:35 PM, Yakir Yang wrote:
Hi all,
On Tue, Oct 20, 2015 at 09:08:00AM +0100, Russell King - ARM Linux wrote:
> > > Currently i915/audio component works as you described. The audio is
> > > optional and HDMI graphics works without audio, while HDMI HD-audio
> > > mandates i915 graphics.
> >
> > Right, but we also add additional int
https://bugzilla.kernel.org/show_bug.cgi?id=106271
Alex Deucher changed:
What|Removed |Added
CC||alexdeucher at gmail.com
--- Comment #4 f
On Fri, Oct 09, 2015 at 02:48:33PM -0700, Rafael Antognolli wrote:
> This module is heavily based on i2c-dev. Once loaded, it provides one
> dev node per DP AUX channel, named drm_dp_auxN, where N is an integer.
>
> It's possible to know which connector owns this aux channel by looking
> at the re
https://bugzilla.kernel.org/show_bug.cgi?id=106271
Lukas Wunner changed:
What|Removed |Added
CC||lukas at wunner.de
--- Comment #3 from Lu
On 16 October 2015 at 23:31, Matt Roper wrote:
> On Fri, Oct 16, 2015 at 11:27:10PM +0100, Emil Velikov wrote:
>> On 16 October 2015 at 23:11, Matt Roper wrote:
>> > Both drmGetDevice() and drmGetDevices() currently print a warning when
>> > they encounter an unknown (non-PCI) subsystem type for
On 20 October 2015 at 18:04, Alan Stern wrote:
> On Tue, 20 Oct 2015, Mark Brown wrote:
>
>> On Tue, Oct 20, 2015 at 10:40:03AM -0400, Alan Stern wrote:
>>
>> > Furthermore, that applies only to devices that use synchronous suspend.
>> > Async suspend is becoming common, and there the only restric
This patch optimizes the commit path for i915 driver, by applying
color corrections, only when required. Pipe level color correction
(like CSC/gamma/degamma) once applied, sustain until the next change.
DRM layer sets a flag in crtc state (color_correction_changed),
whenever there is new set_prope
In plane enabling sequence, plane gamma bit is by default enabled.
Plane gamma gets higher priority than pipe gamma, if both enabled.
This patch disables plane gamma from sequence. If required, plane
gamma can be enabled via the color manager drm interface.
Signed-off-by: Shashank Sharma
Signed-
BDW/SKL/BXT support Color Space Conversion (CSC) using a 3x3 matrix
that needs to be programmed into respective CSC registers.
This patch does the following:
1. Adds the core function to program CSC correction values for
BDW/SKL/BXT platform
2. Adds CSC correction macros/defines
Signed-off-by:
BDW/SKL/BXT supports Degamma color correction feature, which
linearizes the non-linearity due to gamma encoded color values.
This will be applied before Color Transformation.
This patch does the following:
1. Adds the core function to program DeGamma correction values for
BDW/SKL/BXT platform
2
I915 color manager registers pipe degamma correction as palette
correction before CTM, DRM property.
This patch adds the no of coefficients(512) for degamma correction
as "num_samples_before_ctm" parameter in device info structures,
for BDW and higher platforms.
Signed-off-by: Shashank Sharma
Si
BDW/SKL/BXT platforms support various Gamma correction modes
which are:
1. Legacy 8-bit mode
2. 10-bit mode
3. Split mode
4. 12-bit mode
This patch does the following:
1. Adds the core function to program Gamma correction values
for BDW/SKL/BXT platforms
2. Adds Gamma correction macros/defines
I915 color manager registers pipe gamma correction as palette
correction after CTM property.
For BDW and higher platforms, split gamma correction is the best
gamma correction. This patch adds the no of coefficients(512) for
split gamma correction as "num_samples_after_ctm" parameter in device
info
Function intel_attach_color_properties_to_crtc attaches a
color property to its CRTC object. This patch calls this
function from crtc initialization sequence.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion
The color correction blob values are loaded during set_property
calls. This patch adds a function to find the blob and apply the
correction values to the display registers, during the atomic
commit call.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel
CHV/BSW supports Color Space Conversion (CSC) using a 3x3 matrix
that needs to be programmed into CGM (Color Gamut Mapping) registers.
This patch does the following:
1. Attaches CSC property to CRTC
2. Adds the core function to program CSC correction values
3. Adds CSC correction macros
Signed-of
CHV/BSW supports Degamma color correction, which linearizes all
the non-linear color values. This will be applied before Color
Transformation.
This patch does the following:
1. Attach deGamma property to CRTC
2. Add the core function to program DeGamma correction values for
CHV/BSW platform
2.
CHV/BSW platform supports two different pipe level gamma
correction modes, which are:
1. Legacy 8-bit mode
2. 10-bit CGM (Color Gamut Mapping) mode
This patch does the following:
1. Attaches Gamma property to CRTC
3. Adds the core Gamma correction function for CHV/BSW
4. Adds Gamma correction macr
DRM color manager allows the driver to showcase its best color
correction capabilities using the specific query property
cm_coeff_before_ctm_property. The driver must loads the no. of
coefficients for color correction as per the platform capability
during the init time.
This patch adds no of coeff
DRM color manager allows the driver to showcase its best color
correction capabilities using the specific query property
cm_coeff_after_ctm_property. The driver must loads the no. of
coefficients for color correction as per the platform capability
during the init time.
This patch adds no of coeffi
>From DRM color management:
DRM color manager supports these color properties:
1. "ctm": Color transformation matrix property, where a
color transformation matrix of 9 correction values gets
applied as correction.
2. "palette_before_ctm": for corrections which get
This patch create new files intel_color_manager.c which
will contain the core color correction code for I915 driver
and its header intel_color_manager.h
The per color property patches coming up in this patch series
will fill the appropriate functions in this file.
Signed-off-by: Shashank Sharma
This patch adds set property interface for intel CRTC. This
interface will be used for set operation on any DRM properties.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/i915/intel_display.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i
Add a color correction state flag, to indicate a change in
color correction states. This flag will help a core driver to
optimize its commit calls, by appling the color correction only
when there is a change, not every commit.
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/drm_atomic.c | 6 +
Color Manager framework defines a DRM property for color
space transformation and Gamut mapping. This property is called
CTM (Color Transformation Matrix).
This patch adds a new structure in DRM layer for CTM.
This structure can be used by all user space agents to
configure CTM coefficients for co
This patch adds new structures in DRM layer for Palette color
correction.These structures will be used by user space agents
to configure appropriate number of samples and Palette LUT for
a platform.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
include/uapi/drm/drm.h | 20 +++
As per the DRM get_property implementation for a blob, framework
is supposed to return the blob_id to the caller. All the color
management blobs are saved in CRTC state during the set call.
This patch adds get_property support for color management
properties, by referring to the existing blob for
As per DRM color manager design, if a userspace wants to set a correction
blob, it prepares it and sends the blob_id to kernel via set_property
call. DRM framework takes this blob_id, gets the blob, and saves it
in the CRTC state, so that, during the atomic_commit, the color correction
values from
This patch adds new variables in CRTC state, to hold respective color
correction blobs. These blobs will be required during the atomic commit
for writing the color correction values in correction registers.
Signed-off-by: Shashank Sharma
Signed-off-by: Kausal Malladi
---
drivers/gpu/drm/drm_ato
DRM color management is written to extract the color correction
capabilities of various platforms, and every platform can showcase
its capabilities using the query properties.
Different hardwares can have different no of coefficients for palette
correction. Also the correction can be applied after
Color Management is an extension to DRM framework. It allows
abstraction of hardware color correction and enhancement capabilities
by virtue of DRM properties.
There are two major types of color correction supported by DRM
color manager:
- CTM: color transformation matrix, properties where a corre
This patch set adds Color Manager implementation in DRM layer. Color Manager
is an extension in DRM framework to support color correction/enhancement.
Various Hardware platforms can support several color correction capabilities.
Color Manager provides abstraction of these capabilities and allows a
On Mon, Oct 19, 2015 at 06:21:40PM +0200, Geert Uytterhoeven wrote:
> Hi Russell,
>
> On Mon, Oct 19, 2015 at 5:35 PM, Russell King - ARM Linux
> wrote:
> >> > What you can do is print those devices which have failed to probe at
> >> > late_initcall() time - possibly augmenting that with reports
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omap_dmm_tiler.c can't be compiled as a module and it is built
unconditionally as part of omapdrm. Since it can't be used as a module,
there is no need for it to have an unused MODULE_ALIAS().
Signed-off-by: Luis de Bethencourt
---
Hi,
This is a resend of a patch sent September 24 [0]
Submitti
On 20 October 2015 at 07:54, Daniel Vetter wrote:
> On Mon, Oct 19, 2015 at 04:19:08PM -0400, davej at codemonkey.org.uk wrote:
>> On Wed, Sep 30, 2015 at 08:56:26AM +0200, Daniel Vetter wrote:
>>
>> > > The warning on boot seems to be gone as of rc3, but I can now trigger
>> this pretty easily.
From: Luis de Bethencourt
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.
Signed-off-by: Luis de Bethencourt
Acked-by: Boris Brezillon
---
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 1 +
1 file changed, 1 i
Hello,
This is a resend of two patches posted in September 17 [0]
These patches add the missing MODULE_DEVICE_TABLE() for OF to export
the information so modules have the correct aliases built-in and
autoloading works correctly.
A longer explanation by Javier Canillas can be found here:
https://
On 10/19/2015 09:20 PM, Inki Dae wrote:
> Hi,
>
> How about combining patch 5 and 6?
>
> Patch 5 just introduces new internal API but these API aren't used anywhere
> in patch 5.
>
I split it to be easy to understand changes of codes on patch file. It's
no matter to me to combine them.
Anyway
On 10/20/2015 02:30 PM, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> DECON-TV(Display and Enhancement Controller for TV) is a variation
>> of DECON IP. Its main purpose is to produce video stream for HDMI IP.
>>
>> Signed-off-by: Andrzej Hajda
>> ---
>> .../devi
On 20/10/15 14:24, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> > DECON IP requires this clock to access configuration registers.
>> >
>> > Signed-off-by: Andrzej Hajda
>> > ---
>> > Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
>> > 1 fi
On 10/20/2015 02:24 PM, Krzysztof Kozlowski wrote:
> W dniu 20.10.2015 o 18:22, Andrzej Hajda pisze:
>> DECON IP requires this clock to access configuration registers.
>>
>> Signed-off-by: Andrzej Hajda
>> ---
>> Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
>> 1 file chang
https://bugzilla.kernel.org/show_bug.cgi?id=106291
universaledge97 at gmail.com changed:
What|Removed |Added
Attachment #190561|0 |1
is obsolete|
On 20/10/15 12:34, Michael Turquette wrote:
>> diff --git a/include/dt-bindings/clock/exynos5433.h
>> b/include/dt-bindings/clock/exynos5433.h
>> > index 5bd80d5..4f0d566 100644
>> > --- a/include/dt-bindings/clock/exynos5433.h
>> > +++ b/include/dt-bindings/clock/exynos5433.h
>> > @@ -765,7 +765,
On 18.10.2015 13:05, Lukas Wunner wrote:
> vga_switcheroo_client_ops has always been declared const since its
> introduction with 26ec685ff9d9 ("vga_switcheroo: Introduce struct
> vga_switcheroo_client_ops").
>
> Do so for vga_switcheroo_handler as well.
>
> drivers/gpu/drm/amd/amdgpu/amdgpu.ko:
On Tue, 20 Oct 2015, Tomeu Vizoso wrote:
> On 20 October 2015 at 18:04, Alan Stern wrote:
> > On Tue, 20 Oct 2015, Mark Brown wrote:
> >
> >> On Tue, Oct 20, 2015 at 10:40:03AM -0400, Alan Stern wrote:
> >>
> >> > Furthermore, that applies only to devices that use synchronous suspend.
> >> > Asyn
Hello,
On 2015-10-20 12:34, Michael Turquette wrote:
> Quoting Andrzej Hajda (2015-10-20 02:22:32)
>> HDMI driver must re-parent respective muxes during HDMI-PHY on/off
>> to HDMI-PHY output clocks. To reference those clocks their
>> definitions should be added.
>>
>> Signed-off-by: Andrzej Hajda
})
...this part is new, and allows us the full flexibility of device
properties. And the appropriate gpiod_get* function is supposed to
transparently work on either DT or ACPI.
--
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We have added two patches to optimize multiple commit calls, to address Gary's
comment, using one additional flag in CRTC state.
We have tested this, and it's working for both Android and Linux.
I am sending this new patch set now (v7), which has these two additional
patches, in total 25 in co
https://bugzilla.kernel.org/show_bug.cgi?id=106341
Tim Small changed:
What|Removed |Added
Regression|No |Yes
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Bug ID: 106341
Summary: radeon - monitors fail to sync with modes with
vertical refresh rate under 60 Hz on FirePro V4800
Product: Drivers
Version: 2.5
Kernel Version: 4.3.0-rc6
Another vga_switcheroo cleanup. Maintainers, is it okay to include the
one-line change of each driver in here or do you want that split into
separate patches?
Thanks,
Lukas
Lukas Wunner (1):
vga_switcheroo: Constify vga_switcheroo_handler
drivers/gpu/drm/amd/amdgpu/amdgpu_atpx_handler.c | 2
On Tue, 20 Oct 2015, Mark Brown wrote:
> On Tue, Oct 20, 2015 at 10:40:03AM -0400, Alan Stern wrote:
>
> > Furthermore, that applies only to devices that use synchronous suspend.
> > Async suspend is becoming common, and there the only restrictions are
> > parent-child relations plus whatever
On Tue, Oct 20, 2015 at 10:23:11AM +0100, Liviu Dudau wrote:
> Changelog:
> v4: Fixed a bug where the wrong pointer was sent to component_match_add() and
> component_master_add_with_match() in the armada_drv.c file that was
> flagged
> by kbuild test robot. Dropped the RFC tag and added Ac
r the bug.
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Hello Yakir,
On 10/20/2015 04:10 AM, Yakir Yang wrote:
> Hi Javier,
>
> On 10/19/2015 06:40 PM, Javier Martinez Canillas wrote:
>> Hello Yakir,
>>
>> On 10/10/2015 05:35 PM, Yakir Yang wrote:
>>> Hi all,
>>>
>>> The Samsung Exynos eDP controller and Rockchip RK3288 eDP controller
>>> share th
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Hi Jon,
2015-10-20 11:09 GMT+02:00 Jon Nettleton :
> On Tue, Oct 20, 2015 at 11:00 AM, Lucas Stach
> wrote:
>> Am Dienstag, den 20.10.2015, 09:20 +0200 schrieb Christian Gmeiner:
>>> Hi Lucas,
>>>
>>> 2015-10-13 10:25 GMT+02:00 Lucas Stach :
>>> > Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb
Hi Lucas,
2015-10-20 11:00 GMT+02:00 Lucas Stach :
> Am Dienstag, den 20.10.2015, 09:20 +0200 schrieb Christian Gmeiner:
>> Hi Lucas,
>>
>> 2015-10-13 10:25 GMT+02:00 Lucas Stach :
>> > Am Mittwoch, den 30.09.2015, 09:53 +0200 schrieb Christian Gmeiner:
>> >> Hi Lucas,
>> >>
>> >> 2015-09-28 12:3
On Fri, Sep 11, 2015 at 04:10:10PM +0200, Lucas Stach wrote:
> Hey all,
>
> this is a new posting of the Etnaviv DRM driver for Vivante embedded GPUs.
> This time I've squashed all patches to the DRM driver itself into a single
> commit
> to make it easier for people to look at and review this st
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ps, too.
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DECON-TV IP is responsible for generating video stream which is transferred
to HDMI IP. It is almost fully compatible with DECON IP.
The patch is based on initial work of Hyungwon Hwang.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 154 ---
DECON-TV(Display and Enhancement Controller for TV) is a variation
of DECON IP. Its main purpose is to produce video stream for HDMI IP.
Signed-off-by: Andrzej Hajda
---
.../devicetree/bindings/video/exynos5433-decon.txt | 21 -
1 file changed, 12 insertions(+), 9 deletions(
Field .commit is already initialized few lines above.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
index 265a77f..3c
Driver uses four different fields for internal flags. They can be merged
into one.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 61 +--
1 file changed, 30 insertions(+), 31 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_dr
The driver often sets only particular bits of configuration registers.
Using separate function to such action simplifies the code.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 69 ---
1 file changed, 19 insertions(+), 50 deletions(-)
d
All timing registers should contain values decreased by one.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c
b/drivers/gpu/drm/exyn
DECON IP requires this clock to access configuration registers.
Signed-off-by: Andrzej Hajda
---
Documentation/devicetree/bindings/video/exynos5433-decon.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/video/exynos5433-decon.txt
b/Docume
PCLK clock is used by DECON IP. The patch also replaces magic number with
number of clocks in array definition.
Signed-off-by: Andrzej Hajda
---
drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 21 +++--
1 file changed, 11 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/d
This undocumented gate clock is used by DECON IP.
Signed-off-by: Andrzej Hajda
---
drivers/clk/samsung/clk-exynos5433.c | 2 ++
include/dt-bindings/clock/exynos5433.h | 4 +++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/samsung/clk-exynos5433.c
b/drivers/clk/sam
HDMI driver must re-parent respective muxes during HDMI-PHY on/off
to HDMI-PHY output clocks. To reference those clocks their
definitions should be added.
Signed-off-by: Andrzej Hajda
---
drivers/clk/samsung/clk-exynos5433.c | 6 --
include/dt-bindings/clock/exynos5433.h | 5 -
2 files
Hi Inki,
This patchset adds support to DECON-TV in Exynos5433 SoC.
The main patch is prepended with few preparation patches:
- add three clocks required by HDMI pipeline,
- small bindings update,
- driver cleanup.
The patchset is based on the latest exynos-drm-next branch.
Regards
Andrzej
Andr
Hi Krzysztof,
On 10/12/2015 03:26 PM, Inki Dae wrote:
> Hi Andrzej,
>
> For all patches, merged excepting patch 2 which cleans up dt binding
> document.
Could you take this patch [1], it is just small binding cleanup.
[1]: https://patchwork.kernel.org/patch/7264251/
Regards
Andrzej
>
> Thanks
On Tue, Oct 20, 2015 at 12:02:33PM +0200, Daniel Vetter wrote:
> On Tue, Oct 20, 2015 at 10:23:11AM +0100, Liviu Dudau wrote:
> > Changelog:
> > v4: Fixed a bug where the wrong pointer was sent to component_match_add()
> > and
> > component_master_add_with_match() in the armada_drv.c file that
On Tue, Oct 20, 2015 at 11:09:09AM +0100, Russell King - ARM Linux wrote:
> On Tue, Oct 20, 2015 at 11:00:55AM +0100, Emil Velikov wrote:
> > Hi Liviu,
> >
> > On 20 October 2015 at 10:23, Liviu Dudau wrote:
> > > A lot of component based DRM drivers use a variant of the same code
> > > as the pr
On 20/10/2015 11:00 AM, Jan Beulich wrote:
On 20.10.15 at 16:47, wrote:
>> On 19/10/2015 6:29 AM, Jan Beulich wrote:
>>> --- 4.3-rc6/drivers/gpu/drm/mgag200/mgag200_mode.c
>>> +++ 4.3-rc6-mgag200-uninit/drivers/gpu/drm/mgag200/mgag200_mode.c
>>> @@ -194,7 +194,7 @@ static int mga_g200se_set_
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