On Sat, Mar 10, 2012 at 8:20 PM, Carsten Emde wrote:
> Some recent integrated graphics chipset, notably Intel's "Pineview", also
> provide on-chip LVDS support. As an extra service, the LVDS interface supplies
> EDID data - irrespective of whether an LVDS panel is connected or not. The
> drm_mode_
Avoid exporting internal locks to modules, export two
functions lock_modules()/unlock_modules() for them instead.
Cc: Rusty Russell
Signed-off-by: Cong Wang
---
drivers/gpu/drm/drm_fb_helper.c |4 ++--
include/linux/module.h |3 ++-
kernel/kprobes.c|4 ++--
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Name: drivers-gpu-drm-i915-invert-backlight-brightness.patch
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Name: drivers-gpu-drm-add-disable-enable-connector.patch
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Name: drivers-gpu-drm-allow-to-load-edid-firmware.patch
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In the good old days when graphics parameters were configured explicitly
in a file called xorg.conf, even broken hardware could be managed.
Today, with the advent of Kernel Mode Setting, a graphics board is
either correctly working because all components follow the standards -
or the computer is u
https://bugs.freedesktop.org/show_bug.cgi?id=46796
--- Comment #9 from jonathan 2012-03-10 17:04:58 PST
---
This patch causes my computer to crash at login. However, it's not a super bad
crash because I was able to ssh in and check dmesg. The comment did not appear.
Just to make sure it wasn't s
https://bugs.freedesktop.org/show_bug.cgi?id=47162
Michel D?nzer changed:
What|Removed |Added
AssignedTo|xorg-driver-ati at lists.x.org |dri-devel at
lists.freedesktop
The i915 is only able to generate a STOP cycle (i.e. finalize an i2c
transaction) during a DATA or WAIT phase. In other words, the
controller rejects a STOP requested as part of the first transaction in a
sequence.
Thus, for the first transaction we must always use a WAIT cycle, detect
when the d
Instead of polling for gmbus state changes, use the corresponding gmbus
interrupts, when possible.
There are still some cases where using the GMBUS interrupts is not
possible. For instance, this patch only enables the interrupt for
ironlake (+ sandy bridge), and ivybridge. It does not enable the
80 col, spaces around operators and other basic cleanup.
Signed-off-by: Daniel Kurtz
---
drivers/gpu/drm/i915/intel_i2c.c | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index d30.
Return -ENXIO if a device NAKs a transaction.
Note: We should return -ETIMEDOUT, too if the transaction times out,
however, that error path is currently handled by the 'bit-bang fallback'.
Signed-off-by: Daniel Kurtz
---
drivers/gpu/drm/i915/intel_i2c.c | 12 +++-
1 files changed, 11
Save the GMBUS2 value read while polling for state changes, and then
reuse this value when determining for which reason the loops were exited.
This is a small optimization which saves a couple of bus accesses for
memory mapped IO registers.
Signed-off-by: Daniel Kurtz
Reviewed-by: Chris Wilson
-
There is no "disabled" port 0. So, don't even try to initialize/scan
it, etc. This saves a bit of time when initializing the driver, since
it avoids a 50ms timeout waiting for a device to respond on a port that
doesn't even exist.
Similarly, don't initialize the "reserved" port 7, either.
Teste
The i915 has multiple i2c adapters. However, they all share a single
single set of i2c control registers (algorithm). Thus, different threads
trying to access different adapters could interfere with each other.
Note: different threads trying to access the same channel is already
handled in the i
According to i915 documentation [1], "Port D" (DP/HDMI Port D) is
actually gmbus pin pair 6 (gmbus0.2:0 == 110b GPIOF), not 7 (111b).
Pin pair 7 is a reserved pair.
[1] Documentation for [DevSNB+] and [DevIBX], as found on
http://intellinuxgraphics.org
Note: the "reserved" and "disabled" pairs do
Instead of letting other modules directly access the ->gmbus array,
introduce a new API, intel_gmbus_get_adapter(), to lookup an i2c_adapter
for a given gmbus pin pair identifier. This API enables later refactoring
of the gmbus pin pair list.
Note: It is critical that intel_setup_gmbus() gets cal
On Fri, Mar 9, 2012 at 3:15 AM, Maarten Maathuis wrote:
> On Fri, Mar 9, 2012 at 2:50 AM, Yufeng Shen wrote:
>> So a simple case of disabling a CRTC and then re-enabling it.
>>
>> Disabling:
>>
>> CRTC X is originally connected to output Y
>>
>> 1. XRRSetCrtcConfig() is called to disable CRTC
It is very common for an i2c device to require a small 1 or 2 byte write
followed by a read. For example, when reading from an i2c EEPROM it is
common to write and address, offset or index followed by a reading some
values.
The i915 gmbus controller provides a special "INDEX" cycle for performing
This patchset addresses a couple of issues with the i915 gmbus implementation:
* fixes misassigned pin port pair for HDMI-D
* fixes write transactions when they are the only transaction requested
(including large >4-byte writes) by terminating every transaction with a
WAIT cycle.
* returns
Instead of polling for gmbus state changes, use the corresponding gmbus
interrupts, when possible.
There are still some cases where using the GMBUS interrupts is not
possible. For instance, this patch only enables the interrupt for
ironlake (+ sandy bridge), and ivybridge. It does not enable the
Save the GMBUS2 value read while polling for state changes, and then
reuse this value when determining for which reason the loops were exited.
This is a small optimization which saves a couple of bus accesses for
memory mapped IO registers.
Signed-off-by: Daniel Kurtz
Reviewed-by: Chris Wilson
-
It is very common for an i2c device to require a small 1 or 2 byte write
followed by a read. For example, when reading from an i2c EEPROM it is
common to write and address, offset or index followed by a reading some
values.
The i915 gmbus controller provides a special "INDEX" cycle for performing
The i915 is only able to generate a STOP cycle (i.e. finalize an i2c
transaction) during a DATA or WAIT phase. In other words, the
controller rejects a STOP requested as part of the first transaction in a
sequence.
Thus, for the first transaction we must always use a WAIT cycle, detect
when the d
Return -ENXIO if a device NAKs a transaction.
Note: We should return -ETIMEDOUT, too if the transaction times out,
however, that error path is currently handled by the 'bit-bang fallback'.
Signed-off-by: Daniel Kurtz
---
drivers/gpu/drm/i915/intel_i2c.c | 12 +++-
1 files changed, 11
The i915 has multiple i2c adapters. However, they all share a single
single set of i2c control registers (algorithm). Thus, different threads
trying to access different adapters could interfere with each other.
Note: different threads trying to access the same channel is already
handled in the i
There is no "disabled" port 0. So, don't even try to initialize/scan
it, etc. This saves a bit of time when initializing the driver, since
it avoids a 50ms timeout waiting for a device to respond on a port that
doesn't even exist.
Similarly, don't initialize the "reserved" port 7, either.
Teste
Instead of letting other modules directly access the ->gmbus array,
introduce a new API, intel_gmbus_get_adapter(), to lookup an i2c_adapter
for a given gmbus pin pair identifier. This API enables later refactoring
of the gmbus pin pair list.
Note: It is critical that intel_setup_gmbus() gets cal
According to i915 documentation [1], "Port D" (DP/HDMI Port D) is
actually gmbus pin pair 6 (gmbus0.2:0 == 110b GPIOF), not 7 (111b).
Pin pair 7 is a reserved pair.
[1] Documentation for [DevSNB+] and [DevIBX], as found on
http://intellinuxgraphics.org
Note: the "reserved" and "disabled" pairs do
80 col, spaces around operators and other basic cleanup.
Signed-off-by: Daniel Kurtz
---
drivers/gpu/drm/i915/intel_i2c.c | 19 +--
1 files changed, 13 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index d30.
This patchset addresses a couple of issues with the i915 gmbus implementation:
* fixes misassigned pin port pair for HDMI-D
* fixes write transactions when they are the only transaction requested
(including large >4-byte writes) by terminating every transaction with a
WAIT cycle.
* returns
https://bugs.freedesktop.org/show_bug.cgi?id=47162
Michel Dänzer changed:
What|Removed |Added
AssignedTo|xorg-driver-...@lists.x.org |dri-devel@lists.freedesktop
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