Hi Firas,
>>I think we could quickly double the processing gain (and gain 6 dB >>S/N
>>and dynamic range at higher decimation rates) by either shifting >>by 4
>>bits before the CORDIC stage or eliminating the divide by 2 at >>the end
>>of the CORDIC stage.
Can you modify the FPGA quickly and
Hi Don,
>>Don Ward <[EMAIL PROTECTED]> wrote:
>>I don't have the tools to do so.
No tools are required. All what you have to do is to download the free windows
Altera FPGA design software (Quartus II Web edition) from :
http://www.altera.com/products/software/products/quartus2web/sof-quar
I don't have the tools to do so.
No tools are required. All what you have to do is to download the free
windows Altera FPGA design software (Quartus II Web edition) . . .
Yeah, that's the part I haven't done yet . . .
Alternatively (In this case I think it is quicker), tell me the places
Hi all,
I am working with Flex2400 boards and the USRP. I have a question
about the digital module (GMSK data transfer). I observe this: When
I send 660 packets , I receive less than 400 of them and less than
200 are correct.
I setup two PCs with ubuntu and with an USRP each. The antennas wer
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sri ram wrote:
> P.S. I am attaching the output of the rx side.
uOok = True pktno = 47 n_rcvd = 48 n_right = 48
ok = True pktno = 48 n_rcvd = 49 n_right = 49
ok = True pktno = 49 n_rcvd = 50 n_right = 50
ok = True pktno
Hello Dan,
I see that the u0 occurs once every 3 entries which could
explain the ratio between the packets that are received and sent.
I am using a Pentium4 1.8GHz CPU. 'top' tells me that the processor is 98%
free and memory is also 95% free.
Do you still think that this computer
Hello Dan,
Using a higher decimation rate (128) , that problem does not
arise.
Thanks,
Sriram
On Dec 24, 2007 3:16 PM, sri ram <[EMAIL PROTECTED]> wrote:
> Hello Dan,
> I see that the u0 occurs once every 3 entries which could
> explain the ratio between the packe
As preface, I'm not a radio engineer. I'm a software guy with
pretentions to understanding digital hardware. I have a few signal
processing books on a dusty shelf. You lose me as soon as you start
talking "Q signals".
The Odyssey board operates at 10MHz IF; so wouldn't it need an external
tuner
On Mon, Dec 24, 2007 at 02:11:34PM -0800, John Gilmore wrote:
> I'm glad you-all are pointing out low volume prototypes. I hope we'll
> get someone interested who has designed high volume digital radio
> electronics. High volume ~= million-unit. (Do any people like this
> exist? Perhaps Matt's
Just built GNU Radio on Mac OS X Leopard, and the "Hello World" Dial Tone
example worked fine. Tried running 'usrper' to see if it built OK and got
the following error:
dyld: lazy symbol binding failed: Symbol not found:
__ZN11omni_thread6init_tC1Ev
Referenced from: /Users/andrew/gr2/lib/libusrp
Andrew - You'll need to work with the SVN trunk as of r7252
(yesterday). I checked in changes for OSX (any version) to include
the omnithread library in the compilation of the USRP's library and
applications. Updating to the latest SVN will take care of the
"Symbol not found" issue; I don
On 25/12/07 00:30, "Michael Dickens" <[EMAIL PROTECTED]> wrote:
> Andrew - You'll need to work with the SVN trunk as of r7252
> (yesterday). I checked in changes for OSX (any version) to include
> the omnithread library in the compilation of the USRP's library and
> applications. Updating to th
On Dec 24, 2007 5:11 PM, John Gilmore <[EMAIL PROTECTED]> wrote:
The Odyssey board operates at 10MHz IF; so wouldn't it need an external
> tuner?
Yes, but many different tuners (band sets) can be serviced by the same IF
processor.
> What kind of antenna would this require? Something external
Dear Don W.,
1) Modifying the FPGA file (cordic.v) as you suggested was working fine. The
USRP dynamic range was greatly enhanced as follows (the test was done for
decimation rate of 8, using BasicRx board, and sine wave frequency =250KHz):
a) For 9 dBm i/p signal, max count was 26198 (previou
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