> Hye all
>
> Iam also a hardware engineer and work on FPGA and design
> with Digital fundamentals and code on verilog , can u all
> tell me where can i fit into this discussion and how can i
> help.
>
> Regards
>
> Sarvamiti
Welcome. All of the code and designs for the USRP are available at
htt
> I have been successfully using the USRP to digitize NTSC video. However I
> need to change
> the system operation freq to 27 MHz. I am thinking of using cyclone's PLL
> for generating the
> 27 MHz clock for internal operation. But the problem is really feeding the
> 27 MHz clock
> to the ADC. I
Krzysztof Kamieniecki wrote:
Right now it looks like my software does to the demodulation and calculation of
position into xyz coordinates, I'm still looking for enough raw data to be able
to test the full position calculation.
Hi. I'm a newbie in this list, but I'm a telecom engineer and have
ex
This is the GPS standard
http://www.navcen.uscg.gov/gps/geninfo/ICD-GPS-200C%20with%20IRNs%2012345.pdf
There are more links to interesting GPS documents at
http://comsec.com/wiki?GlobalPositioningSystem
Which is part of the GNURadio Wiki
http://comsec.com/wiki
Quoting Jesus Cea <[EMAIL PROTECTED
Greetings,
I updated my code from CVS yesterday and the
tx_check.py was missing in the gnuradio-examples. Was
this removed ?
I am still wresting with the issues below. This time I
tried usrp_siggen.py and it fails the first time
giving:
[EMAIL PROTECTED] usrp]$ ./usrp_siggen.py
usrp: found usr
Just saw this on my SARA (Society of Amateur Radio Astronomers) list:
http://arxiv.org/abs/astro-ph/0503067
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On Tue, Mar 22, 2005 at 07:04:13AM -0800, Javs wrote:
> Greetings,
>
> I updated my code from CVS yesterday and the
> tx_check.py was missing in the gnuradio-examples. Was
> this removed ?
Yep. Try usrp_siggen.py instead.
> I am still wresting with the issues below. This time I
> tried usrp_si
Note: forwarded message attached.
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Sure. I am running Redhat 4.0 on a linux machine with a VIA EBC-C3 733MHz MMX compatibl
Rahul,
Sorry for the delay in responding. Answering your questions in
reverse order:
On Thu, Feb 10, 2005 at 04:37:12PM -0500, Rahul Dhar wrote:
> Given 802.11's tight timing requirements (discussed
> briefly earlier in this thread), can the CPU schedule and send packets
> fast enough?
I think
Hi Eric and Matt
When the input IF signal passes quadrature
downconverter, does any kind of carrier and symbol
synchronization is performed in the FPGA code? If so,
which algorithm did you use?
Thanks
Sachi
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Hello everyone,
We'd like to make some off-air HDTV measurements, but realize the Microtune
4937-based RF front-ends are no longer available.
We've tried eBay and parts brokers. We've looked at alternative RF
front-ends, but the IF output is usually too high for the A/D card. We could
patch toge
Quoting Graham Stead <[EMAIL PROTECTED]>:
> Hello everyone,
>
> We'd like to make some off-air HDTV measurements, but realize the Microtune
> 4937-based RF front-ends are no longer available.
>
> We've tried eBay and parts brokers. We've looked at alternative RF
> front-ends, but the IF output is
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