Patrik Eliardsson wrote:
Hi everyone,
Since we try to improve the ddc performance, (see
http://lists.gnu.org/archive/html/discuss-gnuradio/2009-06/msg00075.html)
I have to simulate my modifications to the FPGA.
Is there any testbenches for the complete system? I've found
single_u2_sim.v, but wh
Hi everyone,
Since we try to improve the ddc performance, (see
http://lists.gnu.org/archive/html/discuss-gnuradio/2009-06/msg00075.html) I
have to simulate my modifications to the FPGA.
Is there any testbenches for the complete system? I've found single_u2_sim.v,
but when I simulate this file
