Hi everyone, Since we try to improve the ddc performance, (see http://lists.gnu.org/archive/html/discuss-gnuradio/2009-06/msg00075.html) I have to simulate my modifications to the FPGA.
Is there any testbenches for the complete system? I've found single_u2_sim.v, but when I simulate this file the flash.rom file is missing. Should this file contain the binary firmware that is loaded during boot? Can anyone give me some hint how to simulate the entire system, I'm using windows with ISE simulator? Regards, Patrik _______________________________________________ Discuss-gnuradio mailing list Discuss-gnuradio@gnu.org http://lists.gnu.org/mailman/listinfo/discuss-gnuradio
