On Mon, May 17, 2010 at 12:00 PM, wrote:
> Date: Sun, 16 May 2010 10:20:51 -0700 (PDT)
> From: D V
> Subject: [Discuss-gnuradio] USRP1 Testbench Question
> To: discuss-gnuradio@gnu.org
> Message-ID: <683009.51945...@web114517.mail.gq1.yahoo.com>
> Content-Type: text
Hello all,
I'm new to SDR, the USRP, and FPGA programming, and I was
wondering if someone could help me with a question on writing Verilog
test benches.
I'm getting a Spartan 3E dev board to play with, and to learn more about SDR
and Verilog FPGA programming, I thought it might make a nice
