Apologies, I have posted in USRP mailing list thank you!
On Sat, Feb 10, 2024, 11:27 AM Brian Padalino wrote:
> On Sat, Feb 10, 2024 at 2:14 PM Chris wrote:
>
>> All, I am trying to offload some of my processing power onto my X310's
>> FPGA. I have the environment set up but still find myself c
On Sat, Feb 10, 2024 at 2:14 PM Chris wrote:
> All, I am trying to offload some of my processing power onto my X310's
> FPGA. I have the environment set up but still find myself confused on how
> to build the out of tree block. I was able to add a block and I'm not sure
> what to do next?
>
>
> M
All, I am trying to offload some of my processing power onto my X310's
FPGA. I have the environment set up but still find myself confused on how
to build the out of tree block. I was able to add a block and I'm not sure
what to do next?
My design process is as follows: Matlab, get HDL code for D
Hey all,
I'm currently working on frequency sensing using the HackRF SDR. However,
when I calculate the FFT, I encounter a DC offset that's higher than the
actual signal strength itself. This offset is interfering with my ability
to detect the intended output accurately. Could you please assist me
