Hi,
> From: Johnathan Corgan
> > > Due to size limitations, the support for the WBX and XCVR2450
> > > daughterboards has been separated into distinct firmware images.
> > >
> > > Johnathan Corgan
> >
> >
> > USRP2 RAM limitations? Or what limitations?
>
> Yes, the code store for the embedde
On Tue, 2010-03-02 at 22:48 -0800, Firas Abbas wrote:
> > Due to size limitations, the support for the WBX and XCVR2450
> > daughterboards has been separated into distinct firmware images.
> >
> > Johnathan Corgan
>
>
> USRP2 RAM limitations? Or what limitations?
Yes, the code store for the em
Hi,
> From: Johnathan Corgan
>
> Due to size limitations, the support for the WBX and XCVR2450
> daughterboards has been separated into distinct firmware images.
>
> Johnathan Corgan
USRP2 RAM limitations? Or what limitations?
Best Regards,
Firas
__
Hi:
I use benchmark_rx.py and benchmark_tx.py to send file to receive side.
But, If only one packet, it always false or the last one packet always false.
If I let it sleep ( time.sleep(1) ), the next one packet also was false.
Why? And How to solve it?
And the other question, How receive side
On 03/02/2010 08:21 AM, Yan Nie wrote:
Dear all,
I wanna apply a series of signal generated from the signal generator as
a input of the LFRX daughterboard to test my FPGA configuration for at
the receiver side. I'm wondering what the power limitation of the LFRX
daughterboar is?
+10 dBm will
On Tue, Mar 2, 2010 at 12:43, Andy_Long wrote:
> Since I am the beginner user of Linux system, I do not know how to enter
> this website address in terminal. So I just download u2_flash_tool file to
> my computer fold and go to this fold directory to run the command
> u2_flash_tool again. But I s
Hello,
I have finished all the install setup of GNUradio (in Ubuntu 9.04 by using
DebianPackages)and test for dial_tone example which seems operating well.
One problem is that the SD card delivered is broken as mentioned on website
that I have to use another SD card and write firmware by myself.
On Sat, Feb 20, 2010 at 01:43:24PM -0800, Veljko Pejovic wrote:
> I narrowed down the problem to this:
>
> - In a standard benchmark_rx.py example from "digital" immediately
> after a packet is received the callback is triggered.
>
> - In the ofdm case the the callback is triggered in groups sepa
On Tue, Mar 2, 2010 at 10:16, Yan Nie wrote:
> I got a problem on opening usrp, but this program and the usrp worked well
> before. The error message is as below:
> write_internal_ram failed: error sending control message: Protocol error
> usrp: failed to load firmware /usr/local/share/usrp/rev2
Hi all,
I got a problem on opening usrp, but this program and the usrp worked well
before. The error message is as below:
e...@ubuntu:~$ usrp_sounder.py -t -f 3M
write_internal_ram failed: error sending control message: Protocol error
usrp: failed to load firmware /usr/local/share/usrp/rev2/std.
The most recent USRP2 binary firmware files based on 3.3git series
have been posted.
Changes:
* Addition of WBX daughterboard support in USRP2 (Jason Abele, Ettus Research)
* Addition of set_antenna() call in libusrp2/gr-usrp2 API, currently
supported by the XCVR2450 only. (Josh Blum, Ettus Res
On Thu, Feb 25, 2010 at 05:35:32PM +0100, elettra.p...@libero.it wrote:
>
>
> >Messaggio originale
> >Da: trondeau1...@gmail.com
> >Data: 25-feb-2010 15.57
> >A: "elettra.p...@libero.it"
> >Cc:
> >Ogg: Re: [Discuss-gnuradio] Question about inputs and outputs of a block
> >
> >On Thu, Feb
On Thu, Feb 25, 2010 at 11:41:23AM -0800, Josh Blum wrote:
> gr_make_io_signature2 and 3? Common mr gnuradio, with your fancy c++
> and your smart pointers and your swig. How-about replacing this with
> a single gr_make_io_signature with some parameter defaults:
>
> gr_make_io_signature(min, max,
Dear all,
I wanna apply a series of signal generated from the signal generator as a input
of the LFRX daughterboard to test my FPGA configuration for at the receiver
side. I'm wondering what the power limitation of the LFRX daughterboar is?
Thanks in advance
Regards,
Yan
_
Citando Martin Braun :
On Thu, Feb 25, 2010 at 04:16:20PM +0100, Daniele Bertussi wrote:
Good morning,
I need to implement a double 802.15.4-802.11b transmitter that transmits
packets in asynchronous (or aperiodical) mode.
I realized a simple program where the output of the two trasmitters are
On Mon, Mar 1, 2010 at 11:33 PM, Michael Berman wrote:
> It appears that the entire USRP2/FPGA directory was removed from the
> repository on 2/28/2010.
>
> Was this an error, or is the Verilog code no longer going to be posted?
>
>From the git log:
Revision a2c00f5c
ID: a2c00f5cff7407ff10fc6c8
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