On Thu, 19 Sep 2019 at 17:31, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 03:36:50PM +0300, Ard Biesheuvel wrote:
> > On Thu, 19 Sep 2019 at 14:25, Leif Lindholm
> > wrote:
> > > > The problem is that the first branch instruction is patched into the
> > > > FV files by the BaseTools, and so
On Thu, Sep 19, 2019 at 03:36:50PM +0300, Ard Biesheuvel wrote:
> On Thu, 19 Sep 2019 at 14:25, Leif Lindholm wrote:
> > > The problem is that the first branch instruction is patched into the
> > > FV files by the BaseTools, and so the startup code is entered in ARM
> > > mode by default.
> > >
>
On Thu, 19 Sep 2019 at 14:25, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 01:53:35PM +0300, Ard Biesheuvel wrote:
> > > > I mean that I'd prefer to assemble the .asm files in ARM mode,
> > > > especially since I am not convinced that the startup code we have is
> > > > guaranteed to switch in
On Thu, Sep 19, 2019 at 01:53:35PM +0300, Ard Biesheuvel wrote:
> > > I mean that I'd prefer to assemble the .asm files in ARM mode,
> > > especially since I am not convinced that the startup code we have is
> > > guaranteed to switch into the right mode after the CPU comes out of
> > > reset in AR
> The doc suggests that something like
>
> AREA CODE, ARM
>
> should do the trick?
>
I did try and this does not seem to do anything for the barrel shifting.
--
Baptiste Gerondeau
Engineer - HPC SIG - LDCG - Linaro
#irc : BaptisteGer
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On Thu, 19 Sep 2019 at 13:47, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 01:37:40PM +0300, Ard Biesheuvel wrote:
> > On Thu, 19 Sep 2019 at 13:34, Baptiste Gerondeau
> > wrote:
> > >> In any case, I'd strongly prefer it if the .S and .asm files produced
> > >> identical object code, so plea
On Thu, Sep 19, 2019 at 01:37:40PM +0300, Ard Biesheuvel wrote:
> On Thu, 19 Sep 2019 at 13:34, Baptiste Gerondeau
> wrote:
> >> In any case, I'd strongly prefer it if the .S and .asm files produced
> >> identical object code, so please apply the same changes to the sibling
> >> .S files as well,
On Thu, 19 Sep 2019 at 13:34, Baptiste Gerondeau
wrote:
>>
>>
>>
>> > > So is this simply the default of the compiler? I'd prefer it if we
>> > > could add a 'CODE 32' directive instead, that way, we may not need any
>> > > of the other changes to begin with.
>
>
> > Oh, and the CODE 32 directive
On Thu, Sep 19, 2019 at 01:25:37PM +0300, Ard Biesheuvel wrote:
> On Thu, 19 Sep 2019 at 13:09, Leif Lindholm wrote:
> > > So is this simply the default of the compiler? I'd prefer it if we
> > > could add a 'CODE 32' directive instead, that way, we may not need any
> > > of the other changes to b
>
>
>
> > > So is this simply the default of the compiler? I'd prefer it if we
> > > could add a 'CODE 32' directive instead, that way, we may not need any
> > > of the other changes to begin with.
>
> Oh, and the CODE 32 directive is not supported - it's ARM or THUMB :)
>
https://docs.microsoft.c
On Thu, 19 Sep 2019 at 13:09, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 01:01:04PM +0300, Ard Biesheuvel wrote:
> > On Thu, 19 Sep 2019 at 12:48, Leif Lindholm
> > wrote:
> > >
> > > On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> > > > On Wed, 18 Sep 2019 at 15:27, Bapt
On Thu, Sep 19, 2019 at 01:01:04PM +0300, Ard Biesheuvel wrote:
> On Thu, 19 Sep 2019 at 12:48, Leif Lindholm wrote:
> >
> > On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> > > On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> > > wrote:
> > > >
> > > > From: Baptiste GERONDEAU
On Thu, 19 Sep 2019 at 12:48, Leif Lindholm wrote:
>
> On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> > On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> > wrote:
> > >
> > > From: Baptiste GERONDEAU
> > >
> > > RVCT and MSFT's ARM assembler share the same file syntax, but so
On Thu, Sep 19, 2019 at 12:32:56PM +0300, Ard Biesheuvel wrote:
> On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
> wrote:
> >
> > From: Baptiste GERONDEAU
> >
> > RVCT and MSFT's ARM assembler share the same file syntax, but some
> > instructions use pre-UAL syntax that is not picked up
> > by
On Wed, 18 Sep 2019 at 15:27, Baptiste Gerondeau
wrote:
>
> From: Baptiste GERONDEAU
>
> RVCT and MSFT's ARM assembler share the same file syntax, but some
> instructions use pre-UAL syntax that is not picked up
> by MSFT's ARM assembler, this commit translates those instructions
> into MSFT-buil
From: Baptiste GERONDEAU
RVCT and MSFT's ARM assembler share the same file syntax, but some
instructions use pre-UAL syntax that is not picked up
by MSFT's ARM assembler, this commit translates those instructions
into MSFT-buildable ones (subset of UAL/THUMB).
Signed-off-by: Baptiste Gerondeau
From: Baptiste GERONDEAU
RVCT and MSFT's ARM assembler share the same file syntax, but some
instructions use pre-UAL syntax that is not picked up
by MSFT's ARM assembler, this commit translates those instructions
into MSFT-buildable ones (subset of UAL/THUMB).
Signed-off-by: Baptiste Gerondeau
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