On 6/15/23 13:50, Sunil V L wrote:
On Wed, Jun 14, 2023 at 07:11:18PM +0200, Heinrich Schuchardt wrote:
Sunil V L schrieb am Mi., 14. Juni 2023, 19:01:
Recent updates to RISC-V qemu virt platform merged today (07/14),
have enabled both pflash devices for the S-mode payload like EDK2.
These up
On Wed, Jun 14, 2023 at 07:11:18PM +0200, Heinrich Schuchardt wrote:
> Sunil V L schrieb am Mi., 14. Juni 2023, 19:01:
>
> > Recent updates to RISC-V qemu virt platform merged today (07/14),
> > have enabled both pflash devices for the S-mode payload like EDK2.
> > These updates also aligned the
On Wed, Jun 14, 2023 at 07:11:18PM +0200, Heinrich Schuchardt wrote:
> Sunil V L schrieb am Mi., 14. Juni 2023, 19:01:
>
> > Recent updates to RISC-V qemu virt platform merged today (07/14),
> > have enabled both pflash devices for the S-mode payload like EDK2.
> > These updates also aligned the
Sunil V L schrieb am Mi., 14. Juni 2023, 19:01:
> Recent updates to RISC-V qemu virt platform merged today (07/14),
> have enabled both pflash devices for the S-mode payload like EDK2.
> These updates also aligned the design similar to other architectures
> where pflash0 is for read-only code and
Recent updates to RISC-V qemu virt platform merged today (07/14),
have enabled both pflash devices for the S-mode payload like EDK2.
These updates also aligned the design similar to other architectures
where pflash0 is for read-only code and pflash1 for variable store.
Previously only pflash1 was a
