On Wed, 18 Dec 2024 11:23:53 +0800
"Yuquan Wang" wrote:
> On Thu, Dec 12, 2024 at 11:51:54AM +0800, Yuquan Wang wrote:
> > On Wed, Dec 11, 2024 at 03:40:03PM +, Alejandro Lucero Palau wrote:
> > >
> > > On 12/10/24 10:36, Yuquan Wang wrote:
> > > > v3 -> v4:
> > > > - Align base addresse
On Tue, 12 Nov 2024 18:10:56 +0100
Marcin Juszkiewicz wrote:
> W dniu 7.11.2024 o 13:04, Jonathan Cameron pisze:
> > On Tue, 5 Nov 2024 18:43:46 +0800
> > "Yuquan Wang" wrote:
> >
> >> This creates a default pxb-cxl (bus_nr=0xc0) bridge with two
> >> cxl root ports on sbsa-ref. And the memory
On Tue, 5 Nov 2024 18:43:46 +0800
"Yuquan Wang" wrote:
> This creates a default pxb-cxl (bus_nr=0xc0) bridge with two
> cxl root ports on sbsa-ref. And the memory layout places 64K
> space for the cxl host bridge register regions(CHBCR) in the
> sbsa-ref memmap.
>
> In addition, this support in
On Fri, 30 Aug 2024 10:11:17 +0800
Yuquan Wang wrote:
One request - when cross posting to multiple lists, it is useful to
add something to the patch title to make it clear what is EDK2, what
is QEMU etc.
[RFC EDK2 PATCH 1/1]
It might irritate the EDK2 folk but it is useful for everyone else
to
On Fri, 30 Aug 2024 11:15:44 +0800
Yuquan Wang wrote:
> This adds relevant definitions and descriptions of acpi0016 and
> acpi0017 to support CXL.
>
> With the implementation of pxb-cxl on the original pcie host bridge,
> the previous space layout of mmio32 & mmio64 have to be divided to
> provi
On Fri, 30 Aug 2024 11:15:45 +0800
Yuquan Wang wrote:
> Provide CXL Early Discovery Table that describes the static CXL
> Platform Components of sbsa-ref.
>
> This adds a static CXL Host Bridge structure and a CXL Fixed Memory
> Window structure which are implemented as two independent space on
On Tue, 9 Jul 2024 14:01:53 +0100
"Leif Lindholm" wrote:
> On Tue, Jul 09, 2024 at 12:47:09 +0200, Marcin Juszkiewicz wrote:
> > During Linaro Connect MAD24 I was asked to move cache information from
> > being 'per cluster' to be 'per core'. This is a move for implementing
> > MPAM support.
> >
On Fri, 19 Apr 2024 19:50:13 +0200
Ard Biesheuvel wrote:
> From: Ard Biesheuvel
>
> The optimization that enabled entry with MMU and caches enabled at EL1
> removed the strict alignment requirement for XIP code (roughly, any code
> that might execute with the MMU and caches off, which means SEC
On Fri, 19 Apr 2024 13:52:07 +0200
Gerd Hoffmann wrote:
> Hi,
>
> > Gerd, any ideas? Maybe I needs something subtly different in my
> > edk2 build? I've not looked at this bit of the qemu infrastructure
> > before - is there a document on how that image is built?
>
> There is roms/Makefil
On Thu, 18 Apr 2024 09:15:55 +0100
Jonathan Cameron via wrote:
> On Wed, 17 Apr 2024 13:07:35 -0700
> Richard Henderson wrote:
>
> > On 4/16/24 08:11, Jonathan Cameron wrote:
> > > On Fri, 1 Mar 2024 10:41:09 -1000
> > > Richard Henderson wrote:
> > >
> > >> If translation is disabled,
On Thu, 26 Oct 2023 11:49:28 +0200
"Laszlo Ersek" wrote:
> On 10/26/23 10:33, Gerd Hoffmann wrote:
> > On Thu, Oct 26, 2023 at 10:36:35AM +0800, Yoshinoya wrote:
> >
> >> CXL Host Bridge / Root Port / Switch / Device enumeration / HDM Config,
> >> maybe could be integrated into pci drivers st
On Thu, 11 Feb 2021 15:14:09 +
Vijayenthiran Subramaniam wrote:
> Hi,
>
> On Wed, Feb 3, 2021 at 9:08 AM Vijayenthiran Subramaniam
> wrote:
> >
> > This patch series adds HMAT tables for Arm's Neoverse reference design
> > multi-chip fixed virtual platforms. The first patch in the series ad
On Fri, 29 Jan 2021 17:11:03 +
Vijayenthiran Subramanian wrote:
Hi Vijayenthiran,
> > > > + // Memory Proximity Domain
> > > > + {
> > > > +
> > > > EFI_ACPI_6_3_HMAT_STRUCTURE_MEMORY_PROXIMITY_DOMAIN_ATTRIBUTES_INIT (
> > > > + 1, 0x0, 0x0),
> > > > +
> > > > EFI_ACPI_6
On Thu, 28 Jan 2021 15:58:48 +
Jonathan Cameron via groups.io wrote:
> On Thu, 28 Jan 2021 19:12:30 +0530
> Vijayenthiran Subramaniam wrote:
>
> > Add HMAT table support for RD-N1-Edge Dual-chip platform.
> >
> > Signed-off-by: Vijayenthiran Subramaniam
>
On Thu, 28 Jan 2021 19:12:30 +0530
Vijayenthiran Subramaniam wrote:
> Add HMAT table support for RD-N1-Edge Dual-chip platform.
>
> Signed-off-by: Vijayenthiran Subramaniam
> ---
> Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2AcpiTables.inf | 1 +
> Platform/ARM/SgiPkg/AcpiTables/RdN1EdgeX2/Hmat
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