Hi, all
There are total 814 open BZ issues in Edk2 project. The detail report can be
found in below link. Please help review your own issues and update their
status. Let’s work together to clean up them.
https://bugzilla.tianocore.org/report.cgi?x_axis_field=bug_status&y_axis_field=assign
Hello,
Recently, we found that when we plug and remove USB3.0 devices quickly under
UEFI Shell on LoongArch platform,
there will be a lag of about 3~15 minutes (the keyboard and mouse do not
reflect under Setup), which looks like the system has halted.
Here we find two possible areas th
Reviewed-by: Robert Kowalewski
-Original Message-
From: Sheng, W
Sent: Tuesday, February 15, 2022 7:58 AM
To: Kuo, Ted ; devel@edk2.groups.io
Cc: Ni, Ray ; Chaganty, Rangasai V
; Huang, Jenny ;
Kowalewski, Robert
Subject: RE: [PATCH v2] IntelSiliconPkg/VTd: Fix to support IntelVTdDma
Reviewed-by: Sai Chaganty
-Original Message-
From: Oram, Isaac W
Sent: Friday, February 11, 2022 4:13 PM
To: devel@edk2.groups.io
Cc: Chaganty, Rangasai V ; Desimone, Nathaniel L
; Gao, Liming
Subject: [edk2-devel][edk2-platforms][PATCH V1 1/1] BeepDebugFeaturePkg: Enable
FixedAtBuil
The change is good to me.
Reviewed-by: Sheng Wei
> -Original Message-
> From: Kuo, Ted
> Sent: 2022年2月15日 14:47
> To: devel@edk2.groups.io
> Cc: Sheng, W ; Ni, Ray ; Chaganty,
> Rangasai V ; Huang, Jenny
> ; Kowalewski, Robert
>
> Subject: [PATCH v2] IntelSiliconPkg/VTd: Fix to support
Hi Ted,
Since we use UINTN as the return type of ParseDmarAcpiTableDrhd (), Could we
keep UINTN here and change define of PROCESS_DRHD_CALLBACK_FUNC ?
typedef
VOID
(*PROCESS_DRHD_CALLBACK_FUNC) (
IN OUT VOID *Context,
IN UINT32 VTdIndex, // change
REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3836
Changed VtdIndex defined in PROCESS_DRHD_CALLBACK_FUNC from UINT32 to UINTN
to avoid type incompatible error when enable PEI in 64bit.
Cc: Sheng Wei
Cc: Ray Ni
Cc: Rangasai V Chaganty
Cc: Jenny Huang
Cc: Robert Kowalewski
Signed-off-by:
Thanks for the update.
Feedback below:
1) How block size is determined for below API?
BOOLEAN
EFIAPI
ParallelHash256HashAll (
IN CONST VOID*Input,
IN UINTN InputByteLen,
OUT VOID*Output,
IN UINTN OutputByteLen,
IN CONST VOID
Hi fengyunhua:
This patch is used to report error messages.
For the contents of the error messages you mentioned, please submit another
bugzilla.
On Thu, Nov 5, 2020 at 09:15 AM, fengyunhua wrote:
>
> I tried this patch, modified OvmfPkgIa32.fdf
> INF OvmfPkg/Sec/SecMain.inf
> ===>
> INM OvmfPk
It has been merged at d4ac53aa91b8a3602166c6adcb9ba8678e0ae969
Thanks
Liming
发件人: devel@edk2.groups.io 代表 Jake Garver via groups.io
发送时间: 2022年2月14日 21:10
收件人: Jake Garver ; devel@edk2.groups.io
主题: Re: [edk2-devel] [PATCH] BaseTools: Fix error leg in DscBuildData.py
Hi folks,
Any in
The edk2 CI was restored and PR 2514 was merged.
https://github.com/tianocore/edk2/pull/2514
Thanks,
Bob
-Original Message-
From: gaoliming
Sent: Tuesday, February 15, 2022 9:04 AM
To: devel@edk2.groups.io; leonardo.gar...@linaro.org
Cc: Feng, Bob C ; Chen, Christine ;
Wang, Jian J
Su
Hello,
The EDK II CI agents are running again. I have requested all the back logged
PRs to
rerun their CI checks and all of those have completed. I have also observed
new PRs
being processed as expected.
We do not have a complete root cause of the issue yet. We are continuing to
collect
dat
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Garcia:
PR https://github.com/tianocore/edk2/pull/2514 has been created for this
change.
But now, CI meets with the problem. This change is not merged. Some people
is investigating CI issue.
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Leonardo
> Garcia
> 发送时间: 2022年2月14日 2
[+ Brijesh]
On Fri, Feb 11, 2022 at 05:48:38PM -0700, dann frazier wrote:
> On Fri, Feb 11, 2022 at 06:31:35PM +, Aaron Young wrote:
> > Hello, my apologies if this has already been
> > discovered/discussed/addressed, but we are seeing a reproducible exception
> > with latest (c9b7c6e0cc7d
+ SECTION PE32 = UefiPayloadPkg/IntelGopDriver.efi
I didn't see file IntelGopDriver.efi in this patch while this file is added
into FDF file.
Is this a generic GOP driver that could work on different platform?
Thanks,
Guo
-Original Message-
From: devel@edk2.groups.io On Behalf Of Se
On Mon, Feb 14, 2022 at 10:24 AM Leonardo Garcia
wrote:
>
> From: Leonardo Garcia
>
> GCC 11.1.0 introduced a new warning for variable length arrays as
> parameters (vla-parameter). Brotli compression library had issues with
> this which were fixed upstream by commits
> 0a3944c8c99b8d10cc4325f721
Add support for partial free of non cached buffers.
If a request for less than the full size is requested new allocations
for the remaining head and tail of the buffer are added to the list.
Added verification that Buffer is EFI_PAGE_SIZE aligned.
The XHCI driver does this if the page size for the
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>> > Hmm, so you are hiding the #define here to avoid updating
>> > Protocol/PciHostBridgeResourceAllocation.h ...
>> >
>> > I suspect if this can't be implemented in the pci enumerator alone there
>> > is just no way around actually extending uefi protocols. But it's also
>> > not fully clear
Hi everyone,
I found my answer, Reclaim() function calls Fault Tolerant Write protocol, it
is a boot-time service and not available on runtime
Maybe it is a dummy question, why do we support Fault Tolerant Write protocol
in runtime?
Thanks a lot
Tinh Nguyen
-=-=-=-=-=-=-=-=-=-=-=-
Groups.io
From: Leonardo Garcia
GCC 11.1.0 introduced a new warning for variable length arrays as
parameters (vla-parameter). Brotli compression library had issues with
this which were fixed upstream by commits
0a3944c8c99b8d10cc4325f721b7c273d2b41f7b and
27dd7265403d8e8fed99a854b9c3e1db7d79525f in brotli
Hi Sean,
This is a big patch. Here are some high level comments.
For BlSMMStoreDxe/BlSMMStoreDxe.inf, how about rename it to
SmmStoreFvb/SmmStoreFvbRuntimeDxe.inf with below reasons?
a) We don't need "Bl" since Payload would always work with bootloader.
b) We could keep "SMMStore" but I prefer
Hi folks,
Any interest in accepting this simple fix?
Thanks,
Jake
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Group Owner: deve
On February 14, 2022 6:03 PM, Gerd Hoffmann wrote:
> On Tue, Feb 08, 2022 at 08:20:20AM +, Xu, Min M wrote:
> > On January 27, 2022 9:49 PM, Gerd Hoffmann wrote:
> > > > + EFI_HOB_GUID_TYPE *GuidHob;
> > > > + EFI_HOB_PLATFORM_INFO *PlatformInfo = NULL;
> > >
> > > >// Query Host Br
Arm reference design RD-N2 platform has multiple I/O virtualization
blocks that allow connecting PCIe root bus or non-PCIe devices to
the system. Each of the I/O virtualization blocks (IoVirtBlk)
consists of an Arm SMMUv3 compliant MMU-700 controller to handle
address translations and a GIC-700 Int
Arm reference design RD-N2-Cfg1 platform has multiple I/O virtualization
blocks that allow connecting PCIe root bus or non-PCIe devices to the
system. Each of the I/O virtualization blocks (IoVirtBlk) consists of
an Arm SMMUv3 compliant MMU-700 controller to handle address translation
and a GIC-700
From: Shriram K
The IO virtualization block on reference design platforms allow
connecting non-discoverable devices such as PL011 UART. On platforms
that support this, initialize the UART controller connected to the
IO virtualization block.
Signed-off-by: Shriram K
Signed-off-by: Vivek Gautam
Add preprocessor macros for ITS, SMMUv3 and DMA named component nodes
of IORT table that can be used to describe the IO topology connected
to the IO Virtualization block. An IO virtualization block could be
used to connect PCIe root bus or non-PCIe devices.
For a non-PCIe IO-Virtualization block,
Arm reference design platforms such as RD-N2 and RD-N2-Cfg1 have multiple
IO virtualization blocks that allow connecting PCIe root bus or non-PCIe
devices to the system. For platforms that connect non-discoverable (non-
PCI) devices to IO virtualization block, add a SSDT table to describe
such devi
Arm reference design platforms such as RD-N2 and RD-N2-Cfg1 have multiple
I/O virtualization blocks that allow connecting PCIe root bus or non-PCIe
(non-discoverable) devices to the system. Each of the I/O virtualization
blocks consists of an Arm SMMUv3 compliant MMU-700 controller to handle
addres
The SMMUv3 node in IORT table requires interrupt vector information
of 4 programmable interrupts - Event, PRI, Global error, and Sync.
In addition to these interrupt vectors, DeviceID information is
required to support MSI interrupts using GIC ITS block. Add the
PCD entries for SMMUv3 base address,
On Fri, Feb 04, 2022 at 09:17:48AM +, Ojeda Leon, Nicolas wrote:
> Hi Gerd,
>
> > Hmm, so you are hiding the #define here to avoid updating
> > Protocol/PciHostBridgeResourceAllocation.h ...
> >
> > I suspect if this can't be implemented in the pci enumerator alone there is
> > just no way
On Tue, Feb 08, 2022 at 08:20:20AM +, Xu, Min M wrote:
> On January 27, 2022 9:49 PM, Gerd Hoffmann wrote:
> > > + EFI_HOB_GUID_TYPE *GuidHob;
> > > + EFI_HOB_PLATFORM_INFO *PlatformInfo = NULL;
> >
> > >// Query Host Bridge DID to determine platform type
> > > + // Tdx guest stor
On Mon, Feb 14, 2022 at 02:34:30AM +, Xu, Min M wrote:
> Hi
> > > --- a/OvmfPkg/Include/IndustryStandard/IntelTdx.h
> > > +++ b/OvmfPkg/Include/IndustryStandard/IntelTdx.h
> >
> > With this being more widely used it doesn't make sense to have it in
> > IntelTdx.h ...
> >
> I am thinking EFI_H
Hi,
> $ grep -rn --exclude-dir=Build PcdSevEsWorkAreaBase -
> UefiCpuPkg/Library/MpInitLib/AmdSev.c
There is 'git grep' btw.
> I would suggest Renaming PcdSevEsWorkAreaBase to PcdCcWorkAreaBase be in a
> separate patch-set.
> Gerd, What's your thought?
Fine with me.
I'd suggest to (tempor
The patch itself looks good to me.
But when I read the code further, the SwapStack() is implemented as below.
I think you need to enhance it to support the case when RSP is above 4GB.
1. Change UINT32 NewStack to UINTN
2. Change CoreStack from UINT32 to UINTN.
UINT32
SwapStack (
IN UINT32 NewS
Ashraf,
GetStackFramePointer() only returns the lower 32 bits of RBP. Is that expected?
-Original Message-
From: devel@edk2.groups.io On Behalf Of Ashraf Ali S
Sent: Monday, February 14, 2022 12:27 AM
To: devel@edk2.groups.io
Cc: S, Ashraf Ali ; Chiu, Chasel
; Desimone, Nathaniel L
; Z
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