Arm reference design RD-N2-Cfg1 platform has multiple I/O virtualization
blocks that allow connecting PCIe root bus or non-PCIe devices to the
system. Each of the I/O virtualization blocks (IoVirtBlk) consists of
an Arm SMMUv3 compliant MMU-700 controller to handle address translation
and a GIC-700 Interrupt Translation Service (ITS) to support message
signaled interrupts (MSIs).
Add an IORT table for non-discoverable (non-PCIe) devices connected
to one of the I/O virtualization blocks - IoVirtBlk #1 on RD-N2-Cfg1.
In addition to SMMUv3 and ITS nodes, two Named Compoenent nodes are
also added for PL330 DMA controllers connected to IoVirtBlk #1.
While we are adding the IORT table entries for RD-N2-Cfg1 platform
remove the source file entries for incorrect IORT table.
Signed-off-by: Vivek Gautam <vivek.gau...@arm.com>
---
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf | 12 +++-
Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/IortNonPciIoVirtBlk.aslc | 58
++++++++++++++++++++
2 files changed, 69 insertions(+), 1 deletion(-)
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
index b5612e817d01..f522919d8099 100644
--- a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1AcpiTables.inf
@@ -18,8 +18,8 @@
Dbg2.aslc
Fadt.aslc
Gtdt.aslc
- Iort.aslc
RdN2Cfg1/Dsdt.asl
+ RdN2Cfg1/IortNonPciIoVirtBlk.aslc
RdN2Cfg1/Madt.aslc
RdN2Cfg1/Pptt.aslc
Spcr.aslc
@@ -59,6 +59,11 @@
gArmSgiTokenSpaceGuid.PcdOscLpiEnable
gArmSgiTokenSpaceGuid.PcdOscCppcEnable
gArmSgiTokenSpaceGuid.PcdSmmuBase
+ gArmSgiTokenSpaceGuid.PcdSmmuEventGsiv
+ gArmSgiTokenSpaceGuid.PcdSmmuGErrorGsiv
+ gArmSgiTokenSpaceGuid.PcdSmmuPriGsiv
+ gArmSgiTokenSpaceGuid.PcdSmmuSyncGsiv
+ gArmSgiTokenSpaceGuid.PcdSmmuDevIDBase
gArmSgiTokenSpaceGuid.PcdSp804DualTimerBaseAddress
gArmSgiTokenSpaceGuid.PcdSp804DualTimerSize
gArmSgiTokenSpaceGuid.PcdSp804DualTimerInterrupt
@@ -71,6 +76,11 @@
gArmSgiTokenSpaceGuid.PcdWdogWS0Gsiv
gArmSgiTokenSpaceGuid.PcdWdogWS1Gsiv
+ gArmSgiTokenSpaceGuid.PcdPciex16DevIDBase
+ gArmSgiTokenSpaceGuid.PcdPciex8DevIDBase
+ gArmSgiTokenSpaceGuid.PcdPciex41DevIDBase
+ gArmSgiTokenSpaceGuid.PcdPciex40DevIDBase
+
gArmSgiTokenSpaceGuid.PcdIoVirtBlkUart0Base
gArmSgiTokenSpaceGuid.PcdIoVirtBlkUart0End
gArmSgiTokenSpaceGuid.PcdIoVirtBlkUart0Size
diff --git a/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/IortNonPciIoVirtBlk.aslc
b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/IortNonPciIoVirtBlk.aslc
new file mode 100644
index 000000000000..15ba2861ecde
--- /dev/null
+++ b/Platform/ARM/SgiPkg/AcpiTables/RdN2Cfg1/IortNonPciIoVirtBlk.aslc
@@ -0,0 +1,58 @@
+/** @file
+ I/O Remapping Table (IORT) for RD-N2-Cfg1 platform.
+
+ This file presents the I/O Remapping Table for Non-PCIe I/O
+ virtualization block present on RD-N2-Cfg1 platform that
+ connects non-discoverable (non-PCIe) devices.
+ I/O virtualization blocks are combination of SMMUv3, GIC ITS,
+ a local interconnect and Root-Ports to connect PCIe or non-PCIe
+ devices.
+
+ Copyright (c) 2022, Arm Ltd. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Specification Reference:
+ - IORT specification version E.b
+**/
+
+#include "SgiAcpiHeader.h"
+
+#pragma pack(1)
+
+typedef struct
+{
+ EFI_ACPI_6_0_IO_REMAPPING_TABLE Header;
+ ARM_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode;
+ ARM_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode;
+ ARM_EFI_ACPI_6_0_IO_REMAPPING_DMA_NC_NODE DmaNode[2];
+} ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE;
+
+#pragma pack ()
+
+ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort =
+{
+ // EFI_ACPI_6_0_IO_REMAPPING_TABLE
+ {
+ ARM_ACPI_HEADER // EFI_ACPI_DESCRIPTION_HEADER
+ (
+ EFI_ACPI_6_2_IO_REMAPPING_TABLE_SIGNATURE,
+ ARM_EFI_ACPI_6_0_IO_REMAPPING_TABLE,
+ EFI_ACPI_IO_REMAPPING_TABLE_REVISION
+ ),
+ 4, // NumNodes
+ sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset
+ 0, // Reserved
+ },
+
+ EFI_ACPI_ITS_INIT(1),
+
+ EFI_ACPI_SMMUv3_INIT(1),
+
+ // DMA Named Component nodes - DMA0 & DMA1
+ {
+ EFI_ACPI_DMA_NC_INIT(0, "\\_SB_.DMA0"),
+ EFI_ACPI_DMA_NC_INIT(1, "\\_SB_.DMA1"),
+ },
+};
+
+VOID* CONST ReferenceAcpiTable = &Iort;
--
2.17.1
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