FMMT will crash if there is no fv ext_header in a specific FV.
This patch is going to add a check point for this case.
Signed-off-by: Bob Feng
Cc: Liming Gao
Cc: Yuwei Chen
---
BaseTools/Source/C/FMMT/FmmtLib.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/BaseTools/Source/C/FMMT/FmmtL
Mike,
In payload phase, there are two kinds of payloads:
1. the universal payloads that conform to universal payload spec. These
payloads cannot depend on any PCD produced from bootloader phase.
2. the platform payloads. These payloads are developed by the same vendor as
the bootloader. So, they
*Reminder:* TianoCore Bug Triage - APAC / NAMO
*When:* Tuesday, 25 May 2021, 6:30pm to 7:30pm, (GMT-07:00) America/Los Angeles
*Where:*
https://teams.microsoft.com/l/meetup-join/19%3ameeting_OTUyZTg2NjgtNDhlNS00ODVlLTllYTUtYzg1OTNjNjdiZjFh%40thread.v2/0?context=%7b%22Tid%22%3a%2246c98d88-e344-4e
Hi Miki,
I want to fix the case where two binaries are built separately, and both want
to use PCD feature.
For example, bootloader and payload want to have separate PCD data base.
Or two payloads both run at DXE phase, and they both need PCD but don't want to
other payload to change PCD data.
Th
Reviewed-by: Chasel Chiu
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Jason Lou
> Sent: Wednesday, April 14, 2021 10:34 AM
> To: devel@edk2.groups.io
> Cc: Lou, Yun ; Ni, Ray
> Subject: [edk2-devel] [PATCH v1] IntelFsp2WrapperPkg: Remove microcode
> PCDs
>
> REF: ht
Reviewed-by: Nate DeSimone
-Original Message-
From: Lou, Yun
Sent: Wednesday, April 14, 2021 11:49 PM
To: devel@edk2.groups.io
Cc: Lou, Yun ; Chiu, Chasel ;
Desimone, Nathaniel L ; Zeng, Star
; Ni, Ray
Subject: [PATCH v2] IntelFsp2WrapperPkg: Remove microcode related PCDs
REF: https
On 24/05/2021 20:26, Pedro Falcato wrote:
Me and my project have been selected for GSoC this year, under Michael
Kinney and bret. Thank you for the opportunity to collaborate with you
and improve Tianocore!
If anyone has any questions, please fire away :)
How do I get started? I'd like to find
I had a closer look at the MinPlatform specification and I made a TODO list:
https://github.com/riscv/riscv-edk2-platforms/issues/24
Mostly I just have to:
* reorganize and split the FVs to fit the spec
* use the include files to ensure that they contain the correct modules
* switch
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3325
AsmReadSs() in Ia32/GccInlinePriv.c and X64/GccInlinePriv.c return the
DS segment selector value instead of SS.
Signed-off-by: Satoshi Tanda
---
MdePkg/Library/BaseLib/Ia32/GccInlinePriv.c | 2 +-
MdePkg/Library/BaseLib/X64/GccInlinePriv.
This patch series adds secure boot support for Arm's reference design
platforms. The first patch refactors the existing StandaloneMM platform
description file and splits into three different files. This is required
to accomodate for changes register base addresses in RD-N2 platform and
the other su
Add the NorFlashPlatformLib library instance that can be linked with
MM_STANDALONE modules that implement a secure variable storage. The
third instance of the NOR flash is used as the non-volatile storage.
Signed-off-by: Sayanta Pattanayak
---
Platform/ARM/SgiPkg/SgiPlatform.dec
Enable the use of UEFI secure boot for Arm's Neoverse reference design
platforms. The UEFI authenticated variable store uses NOR flash 2 which
is accessible from Standalone MM context residing in a secure partition.
Signed-off-by: Sayanta Pattanayak
---
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
The RD-N2 platform has a different memory map from that of the other
platforms supported under the SgiPkg. To enable the use of StandaloneMM
as a secure partition on RD-N2 platform, refactor the existing
StandaloneMM platform description file. The differing portions are split
into two different fil
Why do we need a new PCD?
Can't we make this the default behavior to only install one instance?
Thanks,
Mike
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Zhiguang Liu
> Sent: Monday, May 24, 2021 2:25 AM
> To: devel@edk2.groups.io
> Cc: Kinney, Michael D ; Liming Gao
Hi Pedro,
Here is a link to background materials to get started with EDK II.
https://github.com/tianocore-training/Tianocore_Training_Contents/wiki
The detailed specifications for the EDK II build systems and coding style are:
https://github.com/tianocore/tianocore.github.io/wiki/EDK-I
Just to get some closure on this thread for the list.
I've had some additional side discussions with Michael D Kinney about the
reasoning behind the patch and wanted to summarize the results after we got to
the root of the issue.
Proposed patch is not required.
Expected usage of the FmpDxe is a
Hi everyone,
Me and my project have been selected for GSoC this year, under Michael Kinney
and bret. Thank you for the opportunity to collaborate with you and improve
Tianocore!
If anyone has any questions, please fire away :)
How do I get started? I'd like to find some easier tasks as to start
*
* Rather than commenting out things you don’t need in the build, our
thinking was to allow some unnecessary building in the interest of reducing
porting complexity. It doesn’t really matter if you don’t need the PciCf8
library as long as it builds fine.
* If you need the
PciLib|Md
Hi Ard,
EDKII is in hard feature freeze starting 2021-05-24 (See
https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Release-Planning).
However, does this apply to the edk2-platforms repo as well? Can you let
me know, please?
Regards,
Sami Mujawar
On 24/05/2021 03:28 PM, Pranav
That being said, for this particular patch
Reviewed-By: Samer El-Haj-Mahmoud
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Samer
> El-Haj-Mahmoud via groups.io
> Sent: Monday, May 24, 2021 7:07 AM
> To: Marcin Wojtas ; devel@edk2.groups.io
> Cc: l...@nuviainc.com; ardb
Add the SMBIOS type 32 table (System Boot Information) that includes
information about the System Boot Status.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf |
1 +
Platform/ARM/SgiPkg/Drivers/SmbiosPlatfor
Add the SMBIOS type 17 table (Memory Device) that includes the
specification of each installed memory device such as size of each
device, bank locator, memory device type, and other related information.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Drivers/Smbios
Add the SMBIOS type 19 table (Memory Array Mapped Addr) that includes
information about the address mapping for a Physical Memory Array.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf
| 1 +
Platform/ARM
Add the SMBIOS type 3 table (System Enclosure) that includes information
about manufacturer, type, serial number and other information related to
system enclosure.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe/SmbiosPlatformDxe.inf |
Add the SMBIOS type 4 table (Processor Information) that includes
information about manufacture, family, processor id, maximum operating
frequency, and other information related to the processor.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/SgiPlatform.dsc.inc
Add the SMBIOS type 16 table (Physical Memory Array) describes a
collection of memory devices that operate together to form a memory
address. It includes information about number of devices, total memory
installed, error correction mechanism used and other related information.
Signed-off-by: Prana
Add the SMBIOS type 7 table (Cache Information) that includes
information about cache levels implemented, cache configuration, ways of
associativity and other information related to cache memory installed.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Drivers/Smb
Add GetProductId API for SGI/RD Platform. The API returns a product id
in integer format based on the platform description data. The product id
is required for other drivers such as SMBIOS.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h
Add the SMBIOS type 1 table (System Information) that includes
information about manufacturer, product name, version, serial number and
other information related to the system identification.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Drivers/SmbiosPlatformDxe
Changes since V3:
- Add UpdateMemorySize API to update memory size information as suggested by
Sami.
Changes since V2:
- Addressed comments from Sami
- Picked up Sami's reviewed-by tags.
Changes since V1:
- Rebase the patches on top of latest master branch
SMBIOS provides basic hardware and fir
SMBIOS provides basic hardware and firmware configuration information
through table-driven data structure. This patch adds SMBIOS driver
support that allows for installation of multiple SMBIOS types. Also add
SMBIOS Type0 (BIOS Information) table, that include information about
BIOS vendor name, ve
Add RD-N2 platform identification values including the part number
and configuration number. This information will be used in populating
the SMBIOS tables.
Signed-off-by: Pranav Madhu
Reviewed-by: Sami Mujawar
---
Platform/ARM/SgiPkg/Include/SgiPlatform.h | 6 +-
1 file changed, 5 insertion
Hi Pranav,
This patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 19/05/2021 09:22 AM, Pranav Madhu wrote:
Extend the SMBIOS support for RD-N2-Cfg1 platform. RD-N2-Cfg1 platform
is a derivative of the RD-N2 platform and so most of the table values
for RD-N2 platfor
Hi Pranav,
This patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 19/05/2021 09:22 AM, Pranav Madhu wrote:
Add the RD-N2-Cfg1 platform identification values including the part
number and configuration number. This information will be used in
populating the SMBIOS t
Hi Pranav,
This patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 19/05/2021 09:22 AM, Pranav Madhu wrote:
Enable ACPI CPPC mechanism for RD-N2-Cfg1 as defined by the ACPI
specification. The implementation uses AMU registers accessible as
Fixed-feature Hardware (FF
Hi Pranav,
This patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 19/05/2021 09:22 AM, Pranav Madhu wrote:
RD-N2-Cfg1 platform supports 2 LPI states, LPI1 (Standby WFI) and LPI3
(Power-down) and the cluster supports LPI2 (Power-down) state. The LPI
implementation a
Hi Pranav,
This patch looks good to me.
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawar
On 19/05/2021 09:22 AM, Pranav Madhu wrote:
The RD-N2-Cfg1 platform includes eight single-thread CPUS. Each of the
CPUs include 64KB L1 Data cache, 64KB L1 Instruction cache and 1MB L2
cache. The platfor
Hi Pranav,
Please see my response inline marked [SAMI].
Regards,
Sami Mujawar
On 19/05/2021 09:22 AM, Pranav Madhu wrote:
From: Aditya Angadi
Arm's RD-N2-Cfg1 platform is a variant of the RD-N2 platform. Compared
to RD-N2 platform, RD-N2-Cfg1 has a reduced core count of eight Neoverse
N2 CP
From: Andreas Sandberg
Bugzilla: 3415 (https://bugzilla.tianocore.org/show_bug.cgi?id=3415)
The GICv3 architecture supports up to 1020 ordinary interrupt
lines. The actual number of interrupts supported is described by the
ITLinesNumber field in the GICD_TYPER register. The total number of
imple
Hi Laszlo,
Joey is not in office today. I will submit this patch shortly so that we can
include this in the release.
Regards,
Sami Mujawar
From: Laszlo Ersek
Date: Sunday, 23 May 2021 at 12:27
To: Ard Biesheuvel , Joey Gouly
Cc: edk2-devel-groups-io , ardb+tianoc...@kernel.org
, l...@nuviai
Reviewed-by: Samer El-Haj-Mahmoud
> -Original Message-
> From: Marcin Wojtas
> Sent: Monday, May 24, 2021 1:29 AM
> To: devel@edk2.groups.io
> Cc: l...@nuviainc.com; ardb+tianoc...@kernel.org; Samer El-Haj-Mahmoud
> ; Sunny Wang
> ; g...@semihalf.com; upstr...@semihalf.com;
> Marcin Wojt
Thanks Mike,
I've not come across edkrepo before. I've been using repo becuase it is
a common tool used by many projects. How does edkrepo compare?
g.
On 12/05/2021 16:53, Kinney, Michael D wrote:
Hi Grant,
There is already a repo like this in tianocore:
https://github.com/tianocor
Reviewed-by: Samer El-Haj-Mahmoud
> -Original Message-
> From: Marcin Wojtas
> Sent: Monday, May 24, 2021 1:29 AM
> To: devel@edk2.groups.io
> Cc: l...@nuviainc.com; ardb+tianoc...@kernel.org; Samer El-Haj-Mahmoud
> ; Sunny Wang
> ; g...@semihalf.com; upstr...@semihalf.com;
> Marcin Wojt
Thanks for the patch.
Not an issue with this patch specifically, but it seems this #define
EFI_ACPI_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_INTERFACE_TYPE_16450 should
probably be renamed to reflect the latest spec (at
https://docs.microsoft.com/en-us/windows-hardware/drivers/bringup/acpi-debug-p
Reviewed-By: Samer El-Haj-Mahmoud
> -Original Message-
> From: Marcin Wojtas
> Sent: Monday, May 24, 2021 1:29 AM
> To: devel@edk2.groups.io
> Cc: l...@nuviainc.com; ardb+tianoc...@kernel.org; Samer El-Haj-Mahmoud
> ; Sunny Wang
> ; g...@semihalf.com; upstr...@semihalf.com;
> Marcin Wojt
Reviewed-By: Samer El-Haj-Mahmoud
> -Original Message-
> From: Marcin Wojtas
> Sent: Monday, May 24, 2021 1:29 AM
> To: devel@edk2.groups.io
> Cc: l...@nuviainc.com; ardb+tianoc...@kernel.org; Samer El-Haj-Mahmoud
> ; Sunny Wang
> ; g...@semihalf.com; upstr...@semihalf.com;
> Marcin Wojt
Reviewed-by: Samer El-Haj-Mahmoud
> -Original Message-
> From: devel@edk2.groups.io On Behalf Of Marcin
> Wojtas via groups.io
> Sent: Sunday, May 23, 2021 5:15 AM
> To: devel@edk2.groups.io
> Cc: liming@intel.com; michael.d.kin...@intel.com; l...@nuviainc.com;
> ardb+tianoc...@kern
Sunny,
I think the issue is outlook removing the extra line breaks. To disable this do
the following (per
https://docs.microsoft.com/en-us/outlook/troubleshoot/message-body/line-breaks-are-removed-in-posts-made-in-plain-text)
Open Outlook.
On the File tab, select Options.
In the Options dialog,
With subject format correction, Reviewed-by: Chasel Chiu
> -Original Message-
> From: Kuo, IanX
> Sent: Monday, May 24, 2021 6:38 AM
> To: devel@edk2.groups.io
> Cc: Kuo, IanX ; Chiu, Chasel ;
> Desimone, Nathaniel L
> Subject: [PATCH v3] MinPlatformPkg/Fsp: Rebase fail when python to
From: IanX Kuo
(a) C:\Users\\AppData\Local\Program\Python\Python38
(b) C:\Python38
(c) C:\Program Files\Python38
Issue only happens on (a) and (c).
(a) happen on have whitespace. Ex: Tony Chen
(c) happen on "Program Files" have whitespace.
Cc: Chasel Chiu
Cc: Nate DeSimone
Signed-off-by: IanX
Add a feature PCD to control if the PCD driver is build as standalone mode.
This way, two mode PCD driver won't share the data base.
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Zhiguang Liu
---
MdeModulePkg/Universal/PCD/Dxe/Pcd.c | 75
Using standalone PCD driver need to change PcdLib and also set a feature PCD.
Cc: Maurice Ma
Cc: Guo Dong
Cc: Benjamin You
Signed-off-by: Zhiguang Liu
---
UefiPayloadPkg/UefiPayloadPkg.dsc | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/UefiPayloadPkg/UefiPayloadP
There are cases that different binary is build differently, and both want to
use PCD feature.
If these two different don't want to use PCD to communicate, they should have a
standalone PCD data base,
For example, bootloader and payload want to have seperately PCD data base.
Zhiguang Liu (2):
M
On Mon, 24 May 2021 at 10:42, Laszlo Ersek wrote:
>
> Hi,
>
> the "OvmfXen.dsc" platform supports not only HVM guests, but also PVH
> guests. This platform does not run on QEMU.
>
> The historical "OvmfPkgIa32.dsc", "OvmfPkgIa32X64.dsc", "OvmfPkgX64.dsc"
> platforms support Xen guests, HVM only. T
Hi Liming,
pon., 24 maj 2021 o 10:42 gaoliming napisał(a):
>
> You can run BaseTools\Scripts\PatchCheck.py -1 to check the patch format.
>
Sure, I ran it prior to submission.
Best regards,
Marcin
> Thanks
> Liming
> > -邮件原件-
> > 发件人: devel@edk2.groups.io 代表 Sunny Wang
> > 发送时间: 2021年5
Hi,
the "OvmfXen.dsc" platform supports not only HVM guests, but also PVH
guests. This platform does not run on QEMU.
The historical "OvmfPkgIa32.dsc", "OvmfPkgIa32X64.dsc", "OvmfPkgX64.dsc"
platforms support Xen guests, HVM only. They dynamically adapt to QEMU
vs. Xen HVM.
This dynamism has bee
You can run BaseTools\Scripts\PatchCheck.py -1 to check the patch format.
Thanks
Liming
> -邮件原件-
> 发件人: devel@edk2.groups.io 代表 Sunny Wang
> 发送时间: 2021年5月24日 11:21
> 收件人: Marcin Wojtas
> 抄送: devel@edk2.groups.io; michael.d.kin...@intel.com;
> l...@nuviainc.com; ardb+tianoc...@kernel.org
Hi, all
Today, we enter into Hard Feature Freeze phase until edk2-stable202105 tag
is created at 2021-05-28. In this phase, there is no feature to be pushed.
The critical bug fix is still allowed.
If the patch is sent after Hard Feature Freeze, and plans to catch this
stable tag, please ad
Hi Sami,
Indeed I forgot about that patchset!
Since Etienne's patches are reviewed already, feel free to ignore this
so he won't need to rebase his code.
Thanks
/Ilias
On Mon, 24 May 2021 at 11:12, Sami Mujawar wrote:
>
> Hi Ilias,
>
>
>
> Thank you for this patch.
>
>
>
> I think this change m
Hi Ilias,
Thank you for this patch.
I think this change may have been covered in
https://edk2.groups.io/g/devel/topic/82880299#75180. However, this is an
independent fix that is needed to the current code (before the 32-bit support
is merged).
Reviewed-by: Sami Mujawar
Regards,
Sami Mujawa
>From SysTableInfo Hob, get ACPI table address, and creat gPldAcpiTableGuid Hob
to store it. Remove diretly adding ACPI table to ConfigurationTable.
Dxe ACPI driver will parse it and install ACPI table from Guid Hob.
Cc: Maurice Ma
Cc: Guo Dong
Cc: Benjamin You
Cc: Ray Ni
Signed-off-by: Zhigua
If HOB contains APCI table information, entry point of AcpiTableDxe.inf
should parse the APCI table from HOB, and install these tables.
We assume the whole ACPI table (starting with
EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER)
is contained by a single gEfiAcpiTableGuid HOB.
Cc: Jian J Wang
Cc:
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Zhiguang Liu
---
MdePkg/Include/UniversalPayload/AcpiTable.h | 28
MdePkg/MdePkg.dec | 3 +++
2 files changed, 31 insertions(+)
diff --git a/MdePkg/Include/UniversalPayload/AcpiTable.h
b
>From SysTableInfo Hob, get Smbios table address, and creat gPldSmbiosTableGuid
>Hob
to store it. Remove diretly adding smbios table to ConfigurationTable.
Dxe module SmbiosDxe will parse it and install smbios table from it.
Cc: Maurice Ma
Cc: Guo Dong
Cc: Benjamin You
Signed-off-by: Zhiguang
UefiPayload parse gPldPciRootBridgeInfoGuid Guid Hob to retrieve PCI root
bridges
information. gPldPciRootBridgeInfoGuid Guid Hob should be created by Bootloader.
Cc: Maurice Ma
Cc: Guo Dong
Cc: Benjamin You
Signed-off-by: Zhiguang Liu
---
UefiPayloadPkg/Library/PciHostBridgeLib/PciHostBrid
V1:
The default EfiSmbiosProtocol operates on an empty SMBIOS table.
The SMBIOS tables are provided by the bootloader on UefiPayloadPkg.
Scan for existing tables in SmbiosDxe and load them if they seem valid.
This fixes the settings menu not showing any hardware information, instead
only "0 MB RAM
Add Universal Payload general defination header file according to
Universal Payload’s documentation
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Zhiguang Liu
---
MdePkg/Include/UniversalPayload/UniversalPayload.h | 33
+
1 file changed, 33 insertions(+)
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Zhiguang Liu
---
MdePkg/Include/UniversalPayload/PciRootBridges.h | 89
+
MdePkg/MdePkg.dec| 6 ++
2 files changed, 9
Cc: Michael D Kinney
Cc: Liming Gao
Signed-off-by: Zhiguang Liu
---
MdePkg/Include/UniversalPayload/SmbiosTable.h | 28
MdePkg/MdePkg.dec | 6 ++
2 files changed, 34 insertions(+)
diff --git a/MdePkg/Include/UniversalPayload/Smbios
This patch set is based on Universal Payload on
https://universalpayload.github.io/documentation/payload-interfaces/index.html
This patch set introduce one general header, three different hob types
and how Universal Payload consume these hobs.
Zhiguang Liu (9):
MdePkg: Add Universal Payload ge
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