Reviewed-By: Samer El-Haj-Mahmoud <samer.el-haj-mahm...@arm.com>
> -----Original Message-----
> From: Marcin Wojtas <m...@semihalf.com>
> Sent: Monday, May 24, 2021 1:29 AM
> To: devel@edk2.groups.io
> Cc: l...@nuviainc.com; ardb+tianoc...@kernel.org; Samer El-Haj-Mahmoud
> <samer.el-haj-mahm...@arm.com>; Sunny Wang
> <sunny.w...@arm.com>; g...@semihalf.com; upstr...@semihalf.com;
> Marcin Wojtas <m...@semihalf.com>
> Subject: [edk2-platforms PATCH 4/6] Marvell/Cn913xDbA: AcpiTables: Use
> unique UID's
>
> The CN9131 variant's SSDT comprised UID's, whose values
> overlapped the ones used in the main DSDT file. Fix that.
>
> Signed-off-by: Marcin Wojtas <m...@semihalf.com>
> ---
> Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> index dc32fe836a..691a709c18 100644
> --- a/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> +++ b/Silicon/Marvell/OcteonTx/AcpiTables/T91/Cn9131DbA/Ssdt.asl
> @@ -18,7 +18,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2,
> "MVEBU ", "CN9131", 3)
> Device (AHC1)
>
> {
>
> Name (_HID, "LNRO001E") // _HID: Hardware ID
>
> - Name (_UID, 0x00) // _UID: Unique ID
>
> + Name (_UID, 0x01) // _UID: Unique ID
>
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
>
> Name (_CLS, Package (0x03) // _CLS: Class Code
>
> {
>
> @@ -43,7 +43,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2,
> "MVEBU ", "CN9131", 3)
> Device (XHC2)
>
> {
>
> Name (_HID, "PNP0D10") // _HID: Hardware ID
>
> - Name (_UID, 0x01) // _UID: Unique ID
>
> + Name (_UID, 0x02) // _UID: Unique ID
>
> Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
>
>
>
> Name (_CRS, ResourceTemplate () // _CRS: Current Resource
> Settings
>
> @@ -62,7 +62,7 @@ DefinitionBlock ("Cn9131DbASsdt.aml", "SSDT", 2,
> "MVEBU ", "CN9131", 3)
> {
>
> Name (_HID, "MRVL0110") // _HID:
> Hardware ID
>
> Name (_CCA, 0x01) //
> Cache-coherent controller
>
> - Name (_UID, 0x00) // _UID:
> Unique ID
>
> + Name (_UID, 0x01) // _UID:
> Unique ID
>
> Name (_CRS, ResourceTemplate ()
>
> {
>
> Memory32Fixed (ReadWrite, 0xf4000000 , 0x100000)
>
> --
> 2.29.0
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