Re: IP Clearance

2020-08-04 Thread Adam Feuer
Xiang introduced me to Peter from Xiaomi, and he is going to help gather some overview data so we can see how many files and authors we're going to be dealing with in different areas of the code. We'll be updating the wiki page here: https://cwiki.apache.org/confluence/display/NUTTX/License+Cleari

Re: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Oleg Evseev
Hi Gustavo, You are right, this one almost surely explains the origin of these specific numbers in config! Thanks! ср, 5 авг. 2020 г. в 01:07, Gustavo Henrique Nihei : > Hi Oleg, > > STM32F746 and STM32F769, although both being from the STM32F7 family, they > provide different amounts of interna

Re: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Oleg Evseev
Oh, ok. Thanks for clarification! ср, 5 авг. 2020 г. в 01:03, David Sidrane : > Hi Oleg, > > > > There are many up_allocateheap In the source tree…but an F7 on PX4 master > has: > > > > And it does not use CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE) > > > > I deleted them and it px4_fmuv5 s

Re: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Gustavo Henrique Nihei
Hi Oleg, STM32F746 and STM32F769, although both being from the STM32F7 family, they provide different amounts of internal SRAM. The memory map screenshot you posted is from STM32F769. The screenshot below was taken from the STM32F746 datasheet. As you can see, the STM32F746 parts only provide 256K

RE: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread David Sidrane
Hi Oleg, There are many up_allocateheap In the source tree…but an F7 on PX4 master has: And it does not use CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE) I deleted them and it px4_fmuv5 still builds. I will clean that up when I get past the upgrade. David *From:* Oleg Evseev [m

RE: AMD64 arch

2020-08-04 Thread Robert Faron
Brennen, I understand that creating a proper driver is the ultimate goal but I am not there yet. While I started writing it, there are a few things that are easier to test first with some direct memory read/writes. Just so you understand the scope of the driver that I will have to write for t

Re: Roadmap?

2020-08-04 Thread Matias N.
Having a (public) roadmap is very good idea, it guides and organizes efforts over time and also gives indication to existing or potential users about which features which are not currently but might as well be there soon. I personally would like to see support for Bluetooth/WiFi on widely used

Roadmap?

2020-08-04 Thread Gregory Nutt
One of the things that I think we are missing is a Roadmap to guide and prioritize new feature development.  Other RTOS' (like Zephyr) do have such published roadmaps and are responsive to needs and requests of users and sponsors.  I have even seen web pages where the Zephyr team has laid out w

Re: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Oleg Evseev
Hi David, As I see they are used to define: CONFIG_RAM_END (CONFIG_RAM_START+CONFIG_RAM_SIZE) which in turn is used in heap allocation (up_allocateheap). By the way I am working with px4 master and custom board stm32f767 (software very close and based on fmu-v5). And I used CONFIG_RAM_SIZE=376832

RE: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread David Sidrane
Both are not used in the source. I would assume it is a legacy C&P from the F4, that should be removed. *From:* Oleg Evseev [mailto:ev.m...@gmail.com] *Sent:* Tuesday, August 04, 2020 12:45 PM *To:* dev@nuttx.apache.org *Subject:* Re: stm32f7 CONFIG_RAM understanding No, internal memory. F

Re: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Oleg Evseev
No, internal memory. For all boards stm32f769i-disco\ stm32f746-ws\ stm32f746g-disco\ nucleo-144\ but just found that except stm32f769i-disco, it understandably defines params for SRAM1 368Kb according to MCU memory map CONFIG_RAM_SIZE=376832 CONFIG_RAM_START=0x2002 вт, 4 авг. 2020 г. в 22:2

Re: stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Gregory Nutt
External SRAM? On 8/4/2020 1:08 PM, Oleg Evseev wrote: Hi, I wonder why stm32f7 boards has such RAM parameters in defconfigs: CONFIG_RAM_SIZE=245760 CONFIG_RAM_START=0x2001 Where do these numbers come from while memory map is this? изображение.png --- With regards, Oleg

stm32f7 CONFIG_RAM understanding

2020-08-04 Thread Oleg Evseev
Hi, I wonder why stm32f7 boards has such RAM parameters in defconfigs: CONFIG_RAM_SIZE=245760 CONFIG_RAM_START=0x2001 Where do these numbers come from while memory map is this? [image: изображение.png] --- With regards, Oleg

Re: Changing headers

2020-08-04 Thread Adam Feuer
Thanks Justin. Can you provide links to the files that had their headers changed (or PRs)? We can correct the header changes. We're trying to follow the license clearing process as outlined on this wiki page: https://cwiki.apache.org/confluence/display/NUTTX/License+Clearing Maybe we need to add

Re: STM32H7: Support for Multiprocessing between Cortex M7 and Cortex M4

2020-08-04 Thread Alan Carvalho de Assis
Hi Frank-Christian, The port is to Cortex-M7, but since NuttX also supports Cortex-M4 it could be possible to run NuttX at both at same time. I don't know if the PX4 guys already did it, maybe... BR, Alan On 8/4/20, Frank-Christian Kruegel wrote: > Hello World; > > I'm about to choose a Cortex

RE: 68k?

2020-08-04 Thread spudaneco
Mike Smith was working on this years ago.  But it never came  upstream.Sent from Samsung tablet.

Re: AMD64 arch

2020-08-04 Thread Brennan Ashton
On Mon, Aug 3, 2020 at 5:48 PM Brennan Ashton wrote: > > Robert, > I ended up with a little less time this weekend than I had hoped for. > Getting the "console" working is a little more tricky because of > restrictions put in place on modern machines that are booting in UEFI > mode. I was able t

Re: 68k?

2020-08-04 Thread Sebastien Lorquet
Never seen this done but I am highly interested. An extremely cool 68k platform to run nuttx would be the Texas Instruments 68k calculators. The V200 has 4M of flash and 256k of RAM. The TI89 and 92+ also have that kind of memories. There is a fully working emulator with a built in debugger, t

STM32H7: Support for Multiprocessing between Cortex M7 and Cortex M4

2020-08-04 Thread Frank-Christian Kruegel
Hello World; I'm about to choose a Cortex M7 microcontroller for a new project. All major vendors (Atmel/Microchip SAME70/V71, STM32F7/H7, NXP IMXRT) seem to be supported. In the list of supportex boards I see a STM32H747i Discovery. The STM32H747 has both a Cortex M7 core and a Cortex M4 co