Brennen,
I understand that creating a proper driver is the ultimate goal but I am not
there yet. While I started writing it, there are a few things that are easier
to test first with some direct memory read/writes. Just so you understand the
scope of the driver that I will have to write for this card, there are 191
16bit registers that are currently defined. Some like the 4 DACs can be
written to as a single 64bit write if you want to change all 4 channels at the
same time. Since this is a new card I need to test the functionality of the
device as well as the code that is written. While I have created a function
that can set all the DAC channels I have not tested the stability of one
channel of the DAC while the others are being changed.
Once a driver instance is written I will even need to test the functionality of
using the driver instance through the kernel verse writing directly to memory
addresses. Since the ultimate goal is a control system for a laser system were
timing is of utmost importance. If going through a driver instance causes any
uncertainty in timing then the direct method will be required, not that I think
that is the case, but only testing will let me know.
-----Original Message-----
From: Brennan Ashton <bash...@brennanashton.com>
Sent: Monday, August 3, 2020 8:49 PM
To: dev@nuttx.apache.org
Subject: Re: AMD64 arch
Robert,
I ended up with a little less time this weekend than I had hoped for.
Getting the "console" working is a little more tricky because of restrictions
put in place on modern machines that are booting in UEFI mode. I was able to
add some logic for booting via UEFI and extracting framebuffer information to
be able to draw on the screen, just need to glue it together and then at least
the output bit will work with most video hardware. The input is a little more
tricky since that usually requires PCI + USB + HID.
You had mentioned that you hard coded the memory addresses found in the scan.
This probably means that you did not create a driver interface. Neither of the
two PCI examples that I created expose a driver interface, but I could tweek
the pci_edu driver to show how this would work. You would register your driver
in drivers/pci.c in this struct:
struct pci_dev_type_s *pci_device_types[] = { #ifdef CONFIG_VIRT_QEMU_PCI_TEST
&pci_type_qemu_pci_test, #endif /* CONFIG_VIRT_QEMU_PCI_TEST */ #ifdef
CONFIG_VIRT_QEMU_EDU &pci_type_qemu_edu, #endif /* CONFIG_VIRT_QEMU_EDU */
NULL, };
From there you would then create and register a character or block device and
register the interfaces with it. The qemu_edu_probe shows how your driver can
collect this information which could then be stored in a struct for your
instance of your device. Then your application would make a read/write/ioctrl
call to /dev/mypcidev which would then be handled by the kernel. Your
application should not be writing directly to physical memory addresses or
doing things like registering interrupts, that should be left to the device
driver.
--Brennan
On Mon, Aug 3, 2020 at 11:47 AM Robert Faron <robe...@cmslaser.com> wrote:
>
> Brennen,
>
> Again I wanted to thanks you for the help you have provided thus far.
>
> After digging in to accessing pci devices in qemu I found that to virtualize
> PCi hardware you first need a board that supports VT-d. The Asus 885M-E
> motherboard only supports VT-x which allows for virtualization of 64bit OSes
> but doesn't support direct access to I/O. So this morning I started using
> Gigabyte H110N motherboard that does support VT-d. It took a bit of time to
> get the device to start using the vfio-pci kernel driver which allows qemu to
> access the card. Once that was complete I can now start qemu with "-device
> vfio-pci,host=01:00:0" and the qemu session now can see the card. The
> qemu_pci_init now can see the card and the Bar0 & Bar1 memory addresses.
> Using that I have written a very simple test program that can be enabled
> using "make menuconfig" called cms. Running cms from the nsh prompt access
> the card and turns on the isolated digital output then reads the state and
> reverses it.
>
> To continue my testing I would like to get the program cms to autorun
> that way I can at least test the I/o functionality. I will modify my
> program which is using hardcoded memory addresses to use the address
> found during a scan of the PCI configuration data so when it boots I
> can find the correct address as I assume it will be different when not
> in qemu
>
> I have tried using com1 (0x3f8) connected to coolterm on another computer to
> see if any terminal could be accessed but haven't had any success. I know you
> said you were going to work on getting a console up but having a serial
> terminal would work for now to keep my progress moving.
>
> -Robert
>
>
>
> -----Original Message-----
> From: Brennan Ashton <bash...@brennanashton.com>
> Sent: Friday, July 31, 2020 5:21 AM
> To: dev@nuttx.apache.org
> Subject: Re: AMD64 arch
>
> Robert,
> I dug into this a little more, and I am fairly confident that the PCI
> subsystem will find your device since it properly traverses the bridges and
> can identify multiple buses.
>
> A couple things that are probably important to check, you are not using the
> COM port on your motherboard for this testing right? There is no support for
> a VGA console right now and the OS is expecting to be able to write to the
> physical serial port.
>
> The warning you are getting in Grub is because the OS is asking for the
> bootloader to put the VGA controller in Text Mode, unfortunately that warning
> you are getting about the console is letting us know that the Grub is using
> UEFI which does not allow switching to text mode. I had implemented a VGA
> text mode console, but we cannot use this because of this limitation. I
> started adding support for the graphics mode so we can get a console drawn on
> the screen to help with debugging, but that is going to have to be a weekend
> project. I did get the graphics mode configured so I suspect it will not be
> too bad, but there are a lot of moving bits.
>
> --Brennan
>
> On Thu, Jul 30, 2020 at 2:24 PM Brennan Ashton <bash...@brennanashton.com>
> wrote:
> >
> > Robert,
> > I'll take a look this evening and get back to you.
> >
> > This has run on bare hardware before, as well as in a jailhouse
> > cell, so it should be fairly close to running on your hardware. I
> > do most of my testing inside of QEMU since it is much easier for me
> > to attach the debugger, but I'll see if I can still get this running
> > directly on my NUC.
> >
> > As for the multiple PCI busses I will need to look at that as well.
> > From what I remember the enumeration code structures handle the bus
> > id, but I would need to look at how we identify the buses that we
> > scan.
> >
> > This is actually all timely because I just got some PCIe hardware
> > that I have been waiting for for a few months, so let's see what we can do.
> >
> > --Brennan
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