> -Original Message-
> From: Jerin Jacob
> Sent: Friday, February 18, 2022 11:42 AM
> To: Sunil Kumar Kori
> Cc: Nithin Kumar Dabilpuram ; Kiran Kumar
> Kokkilagadda ; Satha Koteswara Rao Kottidi
> ; dpdk-dev
> Subject: [EXT] Re: [PATCH v9 2/2] net/cnxk: support priority flow control
>
Fix issues that were discovered during coverity scan.
Tomasz Duszynski (2):
raw/cnxk_gpio: fix resource leak
raw/cnxk_gpio: check pointer before using it
drivers/raw/cnxk_gpio/cnxk_gpio.c | 24 ++
drivers/raw/cnxk_gpio/cnxk_gpio_selftest.c | 2 ++
2 files change
All used resources need to be properly cleaned up in error path.
Fixes: 0e6557b448fa ("raw/cnxk_gpio: add self test")
Coverity issue: 376504
Signed-off-by: Tomasz Duszynski
Reviewed-by: Jerin Jacob Kollanukkaran
---
drivers/raw/cnxk_gpio/cnxk_gpio.c | 24 +++-
1 file change
Even though nonexistent cnxk_gpio is unlikely at this point
it's a good practice to check pointers before using them.
Fixes: 0e6557b448fa ("raw/cnxk_gpio: add self test")
Coverity issue: 376502
Signed-off-by: Tomasz Duszynski
Reviewed-by: Jerin Jacob Kollanukkaran
---
drivers/raw/cnxk_gpio/cnx
One of the E-Switch vports plays the special role - it is assigned as
"E-Switch manager" and has some special exclusive rights and duties - it
maintains all the representors, manages FDB domain flows, etc. By
default, the E-Switch vport index was supposed to be zero on standalone
NICs (regular Conn
One of the E-Switch vports plays the special role - it is assigned as
"E-Switch manager" and has some special exclusive rights and duties - it
maintains all the representors, manages FDB domain flows, etc. By
default, the E-Switch vport index was supposed to be zero on standalone
NICs (regular Conn
The Connect-X steering is a lookup hardware mechanism that accesses
flow tables, matches packets to the rules, and performs specified actions.
Historically, mlx5 PMD implements several software engines to manage
steering hardware facility:
- FW Steering - Verbs/Direct Verbs, uses FW calls to ma
The Connect-X steering is a lookup hardware mechanism that accesses
flow tables, matches packets to the rules, and performs specified actions.
Historically, mlx5 PMD implements several software engines to manage
steering hardware facility:
- FW Steering - Verbs/Direct Verbs, uses FW calls to ma
The HW steering low-level implementation will be added later in another
patch series. To avoid the linkage issues the abstract stub replacement
is provided currently.
Signed-off-by: Suanming Mou
Acked-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/meson.build | 1 +
drivers/net/mlx5/mlx5_dr.c
The new hardware steering engine relies on using dedicated steering WQEs
instead of direct writing to the low-level steering table entries directly.
In the first introduce implementation the hardware steering engine supports
the new queue based Flow API, the existing synchronous non-queue based Flo
The hardware steering is backend to support rte_flow_async API in
mlx5 PMD. The port configuration function creates the queues and
needed flow management resources.
The PMD layer configuration function allocates the queues' context
and per-queue job descriptor pool. The job descriptor pool size
is
The pattern template defines flows that have the same matching
fields but with different matching values.
For example, matching on 5 tuple TCP flow, the template will be
(eth(null) + IPv4(source + dest) + TCP(s_port + d_port) while
the values for each rule will be different.
Due to the pattern tem
The action template holds a list of action types that will be
used together on the same rule. The template's actions instances
will be created only when the template bind to the dedicated
group. And the created actions will be saved to each individual
group in order for best performance. The action
The HW steering uses async queue-based flow rules management
mechanism. The matcher and part of the actions have been
prepared during flow table creation. Some remaining actions
will be constructed during flow creation if needed.
A flow postpone attribute bit describes if flow management
should be
Flow table is a group of flows with the same matching criteria
and the same actions defined for them. The table defines rules
that have the same matching fields but with different matching
values. For example, matching on 5 tuple, the table will be
(IPv4 source + IPv4 dest + s_port + d_port + next_
In case port is being stopped, all created flows should be flushed.
This commit adds the flow flush helper function.
Signed-off-by: Suanming Mou
Acked-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/mlx5_flow.c| 8 ++
drivers/net/mlx5/mlx5_flow_hw.c | 129
2
Jump action connects different level of flow tables and allows packet
handling in the chain of flows.
A new action construct data struct is also added in this commit to help
to handle not only the dynamic jump action but also for the other generic
dynamic actions. The actions with empty mask confi
This commit adds the queue and RSS action. Similar to the jump action,
dynamic ones will be added to the action construct list.
Due to the queue and RSS action in template should not be destroyed
during port restart, the actions are created with standalone indirect
table as indirect action does. W
The mark action is covered by tag action internally. While it is added
the HW will add a tag to the packet. The mark value can be set as fixed
or dynamic as the action mask indicates.
Signed-off-by: Suanming Mou
Acked-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/mlx5.h | 2 +
drivers/
HW steering can support indirect action as well. With indirect action,
the flow can be created with more flexible shared RSS action selection.
This will can save the action template with different RSS actions.
This commit adds the flow queue operation callback for:
rte_flow_async_action_handle_cre
HW steering header reformat action can work under bulk mode. In
this case, when create the table, bulk size of header reformat
actions will be allocated in low level. Afterwards, when create
flow, just simply specify the action index in the bulk and the
encapsulation data to the action will be enou
From: Sunil Kumar Kori
Adds support for priority flow control support for CNXK
platforms.
Signed-off-by: Sunil Kumar Kori
---
v1..v2:
- fix application restart issue.
v2..v3:
- fix pause quanta configuration for cn10k.
- fix review comments.
v3..v4:
- fix PFC configuration with other ty
From: Sunil Kumar Kori
CNXK platforms support priority flow control(802.1qbb) to pause
respective traffic per class on that link.
Adds RoC interface to configure priority flow control on MAC
block i.e. CGX on cn9k and RPM on cn10k.
Signed-off-by: Sunil Kumar Kori
---
v1..v2:
- fix RoC API nam
From: wangyunjian
Sent: Thursday, February 10, 2022 8:11 PM
To: Honnappa Nagarahalli ; dev@dpdk.org;
us...@dpdk.org
Cc: Burakov, Anatoly ; tho...@monjalon.net;
sergio.gonzalez.mon...@intel.com; Feifei Wang ; Ruifeng
Wang ; Huangshaozhang ;
dingxiaoxiong ; nd ; nd
Subject: RE: [dpdk-dev][dpdk-
On 22/02/2022 04:30, Zhang, Qi Z wrote:
Hi Srinivas:
This is the fix for PF driver only, for VF we have a separated fix and it is
not be captured in 20.11.3, but I saw the patches are already merged in stable
tree.
You can try with latest 20.11.4-rc1, or wait for 20.11.4 LTS.
20.11.4 is a
15/02/2022 13:29, Sean Morrissey:
> This patchset introduces the include-what-you-use script which removes
> unused header includes. IWYU GitHub:
>
> https://github.com/include-what-you-use/include-what-you-use
>
> Along with the script there are some patches which make a start on
> removing unne
On Tue, Feb 22, 2022 at 10:51:27AM +, Wenwu Ma wrote:
> The default values of rx mq_mode and rx offloads for port
> will cause symmetric_mp startup failure if the port do not
> support rss or csum. This Patch make the app to reconfigure
> the NIC without them. Only quit the app if the second
>
On Sat, Feb 12, 2022 at 6:10 PM Gowrishankar Muthukrishnan
wrote:
>
> Fix incompatible casting on variables reported by coverity scan.
Series applied to dpdk-next-net-eventdev/for-main. Thanks
>
> Fixes: 6223ede2036 ("event/cnxk: add event port link and unlink")
> Coverity issue: 370582 370584
On Sat, Feb 19, 2022 at 6:05 PM wrote:
>
> From: Pavan Nikhilesh
>
> Using deschedule cmd might incorrectly ignore updates to WQE, GGRP
> on CN9K.
> Use addwork to pipeline work instead.
>
> Signed-off-by: Pavan Nikhilesh
Series applied to dpdk-next-net-eventdev/for-main. Thanks
> ---
> driv
On 21/02/2022 11:22, Zhang, Qi Z wrote:
-Original Message-
From: Zhang, Peng1X
Sent: Monday, February 21, 2022 6:43 PM
To: dev@dpdk.org; sta...@dpdk.org
Subject: RE: [PATCH] net/i40e: enable max frame size at port level
-Original Message-
From: dapengx...@intel.com
Sent: Tu
Coverity flags an untrusted loop bound. Check length of session iv.
Coverity issue: 375802
Fixes: b063e843fa03 ("crypto/virtio: fix IV physical address")
Cc: roy.fan.zh...@intel.com
Cc: sta...@dpdk.org
Signed-off-by: Brian Dooley
---
v2: Fix checkpatch warning
---
drivers/crypto/virtio/virtio
09/02/2022 13:00, Ananyev, Konstantin:
>
> > > >> Or have a generic library for reading LPM entries. L3fwd is supposed
> > > >> to be as small as possible (it no longer is), and the real work should
> > > >> be done by libraries to make it easier to build other applications.
> > > >
> > > > I nev
25/01/2022 04:25, Ben Magistro:
> Currently dumpcap tries to initialize dpdk before parsing command line
> arguments, this makes it impossible to check version or help without
> having the primary process running already.
>
> Signed-off-by: Ben Magistro
> ---
> --- a/app/dumpcap/main.c
> +++ b/ap
On 18/02/2022 09:39, Jerin Jacob wrote:
On Fri, Feb 4, 2022 at 3:17 PM Jayatheerthan, Jay
wrote:
Looks good. Thanks Weiguo for posting this patch and addressing all the
comments!
Acked-by: Jay Jayatheerthan < jay.jayatheert...@intel.com>
Applied to dpdk-next-net-eventdev/for-main. Thanks
Since the ConnectX-6DX the send scheduling capability is provided.
An application can register the dynamic field and dynamic flags
in mbuf for timestamp and specify the desired moment of time
the packet should sent.
The send scheduling feature over ConnectX-6DX uses the complicated
infrastructure
The patch provides check for send scheduling on time hardware capability.
With this capability enabled hardware is able to handle Wait WQEs
with directly specified timestamp values. No Clock Queue is needed
anymore to handle send scheduling.
Signed-off-by: Viacheslav Ovsiienko
---
drivers/common
The wait on time configuration flag is copied to the Tx queue
structure due to performance considerations. Timestamp
mask is preparted and stored in queue structure as well.
Signed-off-by: Viacheslav Ovsiienko
---
drivers/net/mlx5/linux/mlx5_verbs.c | 4
drivers/net/mlx5/mlx5.h
The hardware since ConnectX-7 supports waiting on
specified moment of time with new introduced wait
descriptor. A timestamp can be directly placed
into descriptor and pushed to sending queue.
Once hardware encounter the wait descriptor the
queue operation is suspended till specified moment
of time.
Updated:
- send scheduling feature description for mlx5
- release notes
Signed-off-by: Viacheslav Ovsiienko
---
doc/guides/nics/mlx5.rst | 5 +
doc/guides/rel_notes/release_22_03.rst | 6 ++
2 files changed, 11 insertions(+)
diff --git a/doc/guides/nics/mlx5.rst b/doc/
From: Sunil Kumar Kori
Adds support for priority flow control support for CNXK
platforms.
Signed-off-by: Sunil Kumar Kori
---
v1..v2:
- fix application restart issue.
v2..v3:
- fix pause quanta configuration for cn10k.
- fix review comments.
v3..v4:
- fix PFC configuration with other ty
From: Sunil Kumar Kori
CNXK platforms support priority flow control(802.1qbb) to pause
respective traffic per class on that link.
Adds RoC interface to configure priority flow control on MAC
block i.e. CGX on cn9k and RPM on cn10k.
Signed-off-by: Sunil Kumar Kori
---
v1..v2:
- fix RoC API nam
> > > > >> Or have a generic library for reading LPM entries. L3fwd is supposed
> > > > >> to be as small as possible (it no longer is), and the real work
> > > > >> should
> > > > >> be done by libraries to make it easier to build other applications.
> > > > >
> > > > > I never heard users ask
Check lcore id value is not the maximum core supported.
Using lcore id without this check might cause
out of bound access inside the rte_eal_wait_lcore.
Coverity issue: 375841
Fixes: b2854d5317e8 ("app/pdump: support multi-core capture")
Cc: vipin.vargh...@intel.com
Cc: sta...@dpdk.org
Signed-off
When checking C++ compatibility of SDK headers,
an error is detected by the compiler:
lib/dmadev/rte_dmadev_pmd.h:95:23: error:
‘RTE_DEV_NAME_MAX_LEN’ undeclared here (not in a function)
The header file rte_dev.h must be included.
Fixes: b36970f2e13e ("dmadev: introduce DMA device library")
Cc:
On Tue, Feb 22, 2022 at 12:41:04PM +0100, Thomas Monjalon wrote:
> When checking C++ compatibility of SDK headers,
> an error is detected by the compiler:
>
> lib/dmadev/rte_dmadev_pmd.h:95:23: error:
> ‘RTE_DEV_NAME_MAX_LEN’ undeclared here (not in a function)
>
> The header file rte_dev.h must
are those patch available/merged in dpdk 21.11?
Dong yao (from my iPhone)
> 在 2022年2月22日，下午5:26，Kevin Traynor 写道：
>
> On 22/02/2022 04:30, Zhang, Qi Z wrote:
>> Hi Srinivas:
>> This is the fix for PF driver only, for VF we have a separated fix and it is
>> not be captured in 20.11.3, but I sa
Recently [1] all the drivers running over the mlx5 device started
sharing some objects.
This raised the need to create documentation for the common driver that
would contain information relevant to all drivers and in particular:
- Tutorial for configuration of the device.
- Instruction for using
Vectorized routines were removed in result of Tx datapath refactoring,
and devarg keys documentation was updated.
However, more updating should have been done. In environment variables
doc, there was explanation according to vectorized Tx which isn't
relevant anymore.
This patch removes this irre
Update links in both mlx4 and mlx5 doc.
Signed-off-by: Michael Baum
Acked-by: Viacheslav Ovsiienko
---
doc/guides/nics/mlx4.rst | 4 ++--
doc/guides/nics/mlx5.rst | 6 +++---
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/doc/guides/nics/mlx4.rst b/doc/guides/nics/mlx4.rst
index
Update "BlueField 2" -> "BlueField-2" in mlx5 docs.
Signed-off-by: Michael Baum
Acked-by: Viacheslav Ovsiienko
---
doc/guides/compressdevs/mlx5.rst | 6 +++---
doc/guides/cryptodevs/mlx5.rst | 6 +++---
doc/guides/nics/mlx5.rst | 2 +-
doc/guides/regexdevs/mlx5.rst| 8
4
Adds new documentation for MLX5 common driver that contains:
- Its features list (doesn't exist for now).
- Its devargs description.
- Device configuration information and tutorial.
- Quick Start Guide for Mellanox OFED/EN.
Move into this doc all shared information from other MLX5 PMD docs and
The "tx_db_nc" devarg forces doorbell register mapping to non-cached
region eliminating the extra write memory barrier. This argument was
used in creating the UAR for Tx and thus affected its performance.
Recently [1] its use has been extended to all UAR creation in all mlx5
drivers, and now its n
v3:
This patchset involves the cleanup of sched library:
* Addresses review comments on v2 patchset.
* RTE_SCHED_CMAN is left unmodified in rte_config.h.
Cleanup of this will be taken up later.
* Removed unused flag RTE_SCHED_VECTOR from arm/meson.build. Only
scalar version is now supported.
Remove RTE_SCHED_VECTOR flag from rte_config.h.
This flag is no longer useful. Only scalar version is supported.
Signed-off-by: Megha Ajmera
---
config/arm/meson.build | 1 -
config/rte_config.h| 1 -
lib/sched/rte_sched.c | 54 --
3 files changed,
Grinder configuration is now moved to sched library.
Number of grinders can also modified by specifying
RTE_SCHED_PORT_N_GRINDERS=N in CFLAGS, where N is number of grinders.
Signed-off-by: Megha Ajmera
---
config/rte_config.h| 1 -
doc/guides/sample_app_ug/qos_scheduler.
Removed RTE_SCHED_COLLECT_STATS flag from rte_config.h.
Stats collection is always enabled.
Signed-off-by: Megha Ajmera
---
config/rte_config.h| 1 -
doc/guides/sample_app_ug/qos_scheduler.rst | 6 --
lib/sched/rte_sched.c | 12
3 f
Removed RTE_SCHED_SUBPORT_TC_OV from rte_config.h.
Best effort traffic class oversubscription is always enabled.
Signed-off-by: Megha Ajmera
---
config/rte_config.h | 1 -
drivers/net/softnic/rte_eth_softnic_tm.c | 18 -
examples/qos_sched/init.c| 2 -
Masking of core mask was incorrect. Instead of using 1U for shifting, it
should be using 1LU as the result is assigned to uint64.
CID 375859: Potentially overflowing expression "1U << app_main_core" with
type "unsigned int" (32 bits, unsigned) is evaluated using 32-bit arithmetic,
and then used in
> From: Thomas Monjalon
> Sent: Tuesday 22 February 2022 11:41
> To: dev@dpdk.org
> Cc: Richardson, Bruce ; sta...@dpdk.org;
> Chengwen Feng ; Laatz, Kevin
> ; Morten Brørup ;
> Walsh, Conor
> Subject: [PATCH] dmadev: add missing header include
>
> When checking C++ compatibility of SDK headers,
22/02/2022 12:48, Bruce Richardson:
> On Tue, Feb 22, 2022 at 12:41:04PM +0100, Thomas Monjalon wrote:
> > When checking C++ compatibility of SDK headers,
> > an error is detected by the compiler:
> >
> > lib/dmadev/rte_dmadev_pmd.h:95:23: error:
> > ‘RTE_DEV_NAME_MAX_LEN’ undeclared here (not in
22/02/2022 11:39, Ananyev, Konstantin:
>
> > > > > >> Or have a generic library for reading LPM entries. L3fwd is
> > > > > >> supposed
> > > > > >> to be as small as possible (it no longer is), and the real work
> > > > > >> should
> > > > > >> be done by libraries to make it easier to build o
17/02/2022 09:00, Tyler Retzlaff:
> On Tue, Feb 15, 2022 at 05:08:06PM +, Brian Dooley wrote:
> > Public header files were missing 'extern "C"' guards.
> > This set adds them in.
> >
> > Brian Dooley (11):
> > eal: fix missing C++ guards
> > telemetry: fix missing C++ guards
> > ethdev:
> From: Megha Ajmera [mailto:megha.ajm...@intel.com]
> Sent: Tuesday, 22 February 2022 14.19
>
> Masking of core mask was incorrect. Instead of using 1U for shifting,
> it
> should be using 1LU as the result is assigned to uint64.
>
> CID 375859: Potentially overflowing expression "1U << app_main
On 2/17/2022 11:09 AM, Tomasz Duszynski wrote:
diff --git a/drivers/raw/cnxk_gpio/version.map
b/drivers/raw/cnxk_gpio/version.map
new file mode 100644
index 00..4a76d1d52d
--- /dev/null
+++ b/drivers/raw/cnxk_gpio/version.map
@@ -0,0 +1,3 @@
+DPDK_21 {
+ local: *;
+};
This shoul
17/02/2022 09:06, Tyler Retzlaff:
> On Tue, Feb 15, 2022 at 05:30:26PM +, Bruce Richardson wrote:
> > This set expands upon existing checks for C++ compatibility, adding in
> > checks for both the SDK headers and a basic check for the presence of
> > 'extern "C"' guards in each file.
> >
> > D
When an AF_XDP PMD is created without specifying the 'start_queue', the
default Rx queue associated with the socket will be Rx queue 0. A common
scenario encountered by users new to AF_XDP is that they create the
socket on queue 0 however their interface is configured with many more
queues. In this
15/02/2022 10:25, Morten Brørup:
> > From: Bruce Richardson [mailto:bruce.richard...@intel.com]
> > Sent: Monday, 14 February 2022 16.31
> >
> > The default mempool driver is one based on the rte_ring, and as such it
> > needs to be present to have just about any app (which doesn't override
> > th
Hi,
> -Original Message-
> From: Michael Baum
> Sent: Tuesday, February 22, 2022 2:48 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Raslan Darawsheh
> ; Slava Ovsiienko
> Subject: [PATCH 0/5] refactore mlx5 guides
>
> Recently [1] all the drivers running over the mlx5 device started sharing
Hi,
> -Original Message-
> From: Yajun Wu
> Sent: Monday, February 14, 2022 8:03 AM
> To: Ori Kam ; Slava Ovsiienko
> ; Matan Azrad
> Cc: dev@dpdk.org; NBU-Contact-Thomas Monjalon (EXTERNAL)
> ; Raslan Darawsheh ; Roni
> Bar Yanai ; sta...@dpdk.org
> Subject: [PATCH] common/mlx5: fix QP
Hi,
> -Original Message-
> From: Suanming Mou
> Sent: Tuesday, February 15, 2022 11:46 AM
> To: Slava Ovsiienko ; Matan Azrad
>
> Cc: Raslan Darawsheh ; dev@dpdk.org
> Subject: [PATCH] net/mlx5: remove unused function
>
> The mlx5_l3t_prepare_entry() function is not used anymore.
> This
Hi,
> -Original Message-
> From: Suanming Mou
> Sent: Tuesday, February 15, 2022 12:11 PM
> To: Slava Ovsiienko ; Matan Azrad
>
> Cc: Raslan Darawsheh ; dev@dpdk.org;
> sta...@dpdk.org
> Subject: [PATCH] net/mlx5: fix error infomation missing
>
Fixed typo in the title:
infomation => inf
09/02/2022 14:52, Ferruh Yigit:
> On 2/9/2022 7:24 AM, Weiguo Li wrote:
> > +#ifndef RTE_KNI_FIFO_H
> > +#define RTE_KNI_FIFO_H
>
> It doesn't really differ much but other kni header guards wrapped with '_',
> I don't now why.
No good reason I think.
> If there will be a new version can you plea
Hi,
> -Original Message-
> From: Shun Hao
> Sent: Friday, February 18, 2022 9:43 AM
> To: Matan Azrad ; Slava Ovsiienko
> ; or...@nvidia.com ; tho...@monjalon.net
> Cc: dev@dpdk.org ; Raslan Darawsheh ;
> sta...@dpdk.org
> Subject: [PATCH v1] net/mlx5: provide correct items to meter
> sub-
One of the E-Switch vports plays the special role - it is assigned as
"E-Switch manager" and has some special exclusive rights and duties - it
maintains all the representors, manages FDB domain flows, etc. By
default, the E-Switch vport index was supposed to be zero on standalone
NICs (regular Conn
> >
> > > > > > >> Or have a generic library for reading LPM entries. L3fwd is
> > > > > > >> supposed
> > > > > > >> to be as small as possible (it no longer is), and the real work
> > > > > > >> should
> > > > > > >> be done by libraries to make it easier to build other
> > > > > > >> appl
> -Original Message-
> From: Ajmera, Megha
> Sent: Tuesday, February 22, 2022 12:58 PM
> To: dev@dpdk.org; Singh, Jasvinder ;
> Dumitrescu, Cristian ;
> tho...@monjalon.net; david.march...@redhat.com; Thakur, Sham Singh
>
> Subject: [PATCH v3 0/4] sched: cleanup of sched library
>
> v
On Tue, 22 Feb 2022 15:13:53 +0100
Morten Brørup wrote:
> > From: Megha Ajmera [mailto:megha.ajm...@intel.com]
> > Sent: Tuesday, 22 February 2022 14.19
> >
> > Masking of core mask was incorrect. Instead of using 1U for shifting,
> > it
> > should be using 1LU as the result is assigned to uint6
Hi,
this set contains new ENA features:
* New xstats.
* Reconfigurable link status event.
* Usage of the optimized memcpy on arm/arm64.
* Better MP support.
* Reconfigurable Tx completion timeout value using devarg.
Beside that, this patchset contains multiple fixes, minor improvements, new
DPDK
The linearization of the mbuf isn't common practice for the PMD, as it
can expose it's capabilities to the upper layer using
rte_eth_dev_info_get().
Moreover, the rte_eth_tx_prepare() function should also verify if the
number of segments inside the mbuf isn't too high.
Because of those 2 circumst
To make sure there is no outstanding mbuf in the reused Tx queue (due to
unproper cleanup, or some invalid logic on Tx path), the assertion was
added on the Tx path.
As it's being compiled out in the release version, it won't affect
the IO path performance.
Signed-off-by: Michal Krawczyk
Reviewe
The enumeration seems to be leftover from porting the Linux driver to
the DPDK. It was used nowhere and refers to the ethtool which is not
present in the DPDK.
Signed-off-by: Michal Krawczyk
Reviewed-by: Artur Rojek
Reviewed-by: Dawid Gorecki
Reviewed-by: Igor Chauskin
Reviewed-by: Shai Brande
Those variables are being set, but never read. As they seem to be
leftover from the old offloads API and don't have any purpose right
now, they are simply being removed.
Signed-off-by: Michal Krawczyk
Reviewed-by: Artur Rojek
Reviewed-by: Dawid Gorecki
Reviewed-by: Igor Chauskin
Reviewed-by: S
* Split 'bad_csum' Rx statistic into 'l3_csum_bad' and 'l4_csum_bad' to
be able to check which checksum was not calculated properly.
* Add l4_csum_good statistic, which shows how many times L4 Rx checksum
was properly offloaded.
Signed-off-by: Michal Krawczyk
Reviewed-by: Dawid Gorecki
Revie
ENA uses AENQ for notification about various events, like LSC, keep
alive etc. By default it was enabling all AENQ that were supported by
both the driver and the device. As a result the LSC was always processed
even if the application turned it off explicitly.
As the DPDK provides application with
Some user applications may not support PMD reset handling. If they will
support timer service it could cause a situation, when information
about the reset trigger is being showed every time the timer service is
being called.
Timer service is now being skipped if the reset was already triggered.
F
To increase likehood that current burst will fit in the HW rings,
perform Tx cleanup before pushing packets to the HW. It may increase
latency a bit for sparse bursts, but the Tx flow now should be more
smooth.
It's also common order in the Tx burst function for other PMDs.
Signed-off-by: Michal
As the default behavior for arm64 is to alias rte_memcpy as memcpy, ENA
cannot redefine memcpy as rte_memcpy as it would cause nested
declaration.
To make it possible to use optimized memcpy in the ena_com layer on Arm,
the driver now redefines memcpy when it is beneficial:
* For arm64 only when
From: Stanislaw Kardach
Due to how the ena_com compatibility layer is written, all AQ commands
triggering functions use stack to save results of AQ and then copy them
to user given function.
Therefore to keep the compatibility layer common, introduce ENA_PROXY
macro. It either calls the wrapped f
From: Stanislaw Kardach
Since statistic gathering is now proxied safely to primary process, it
can be enabled in secondary processes.
Signed-off-by: Stanislaw Kardach
Reviewed-by: Michal Krawczyk
Reviewed-by: Shai Brandes
---
drivers/net/ena/ena_ethdev.c | 3 ---
1 file changed, 3 deletions(
Originally, the ena_com memzone counter was shared by ports, which
caused the memzones to be harder to indentify and could potentially
lead to race and beucase of that the counter had to be atomic.
This atomic counter was global variable and it couldn't work in the
multiprocess implementation.
Th
From: Dawid Gorecki
ENA driver did not allow applications to call tx_cleanup. Freeing Tx
mbufs was always done by the driver and it was not possible to manually
request the driver to free mbufs.
Modify ena_tx_cleanup function to accept maximum number of packets to
free and return number of packe
ENA was only supporting retrieval of all the xstats name and wasn't
implementing the eth_xstats_get_names_by_id API.
As this API may be more efficient than retrieving all the names, it
tries to avoid excessive string copying.
Signed-off-by: Michal Krawczyk
Reviewed-by: Dawid Gorecki
Reviewed-by
From: Dawid Gorecki
When triggering the reset, no check was performed to see if the reset
was already triggered. This could result in original reset reaon being
overwritten. Add ena_trigger_reset helper function, which checks if the
reset was triggered and only sets the reset reason if the reset
The default missing Tx completion timeout was set to 5 seconds.
In order to provide users with the interface to control this timeout
to adjust it with the application's watchdog, the device argument for
controlling this value was added.
The parameter is called 'miss_txc_to' and can be modified usi
Whenever Tx checksum offload is being used, the meta descriptor content
is taken into consideration. Setting DF field properly in the meta
descriptor may have huge impact on the performance both for the IPv4 and
IPv6 packets.
The requirements for the df field are as below:
* No offload used - valu
From: Dawid Gorecki
Add information about port id, queue id and req_id to error logs in
validate_tx_req_id.
Signed-off-by: Dawid Gorecki
Reviewed-by: Michal Krawczyk
Reviewed-by: Shai Brandes
---
drivers/net/ena/ena_ethdev.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff -
From: Dawid Gorecki
The ena_com_config_dev_mode() performs many calculations related to LLQ
and then performs an admin queue call to configure LLQ in the device.
All of the operations performed by ena_com_config_dev_mode() are
unnecessary if membar hasn't been found. Move the dev_mem_base check
On Tue, 22 Feb 2022 13:52:27 +
Miao Li wrote:
> + "lcore %u is waked up from value change\n",
That is awkward phrasing in English and should be DEBUG not INFO level
because it may happen often.
Maybe:
"lcore %u awoke because value changed\n"
or something
Some HW may invalidly set checksum error bit for the valid L4 checksum.
To avoid drop of the packets in that situation, do not indicate bad
checksum for L4 Rx csum offloads. Instead, set it as unknown, so the
application will re-verify this value.
The statistics counters will still work as previou
This release contains multiple bug fixes and improvements, including
- Removal of the linearization function from the xmit Tx path. The
DPDK assumes checking for the mbuf segments number in the Tx prepare
function.
- Extra logs, statistics, checks...
- Cleanup of the unused variables
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