> -Original Message-
> From: Aaron Conole
> Sent: Tuesday, May 5, 2020 8:56 PM
> To: Juraj Linkeš
> Cc: bruce.richard...@intel.com; maicolgabr...@hotmail.com;
> ruifeng.w...@arm.com; dev@dpdk.org
> Subject: Re: [PATCH v4 4/4] ci: add aarch64 -> arm32 cross compiling jobs
>
> Juraj Link
CVL kernel PF configures all reserved queues for VF, including
Rx queue RXDID. The number of reserved queues is the maximum
between Tx and Rx queues. If the number of the enabled Rx queues
is less than that of reserved queues, required RXDID will only
be set for those enabled, but default value (0)
Hi Pablo,
It seems there is compilation issue in Clang with this patch.
Regards,
Akhil
> Signed-off-by: Pablo de Lara
> ---
>
> v2:
> - Simplified logic in process_hash_op per Akhil's comments
>
> doc/guides/cryptodevs/zuc.rst | 6 ++--
> doc/guides/rel_notes/release_20_05.rst | 7
Hi Akhil,
So 1st thing is that this that validate-abi uses "ABI Compliance Checker",
which does not use libabigail.ignore.
So you will end up with different results compared to using libabigail as
follows:
DPDK_ABI_REF_DIR= DPDK_ABI_REF_VERSION=v20.02
./devtools/test-meson-builds.sh
I did che
Tested-by: Huang, ZhiminX
Regards,
HuangZhiMin
-Original Message-
From: dev [mailto:dev-boun...@dpdk.org] On Behalf Of Ting Xu
Sent: Monday, May 11, 2020 6:25 PM
To: dev@dpdk.org
Cc: Lu, Wenzhuo ; Xing, Beilei ;
Iremonger, Bernard ; sta...@dpdk.org
Subject: [dpdk-dev] [PATCH v1] app/tes
> -Original Message-
> From: Hemant Agrawal (OSS)
> Sent: Monday, May 11, 2020 11:44 AM
> To: Akhil Goyal ; dev@dpdk.org
> Subject: RE: [PATCH v3 1/2] crypto/dpaa2_sec: improve error handling
>
> Acked-by: Hemant Agrawal
Series Applied to dpdk-next-crypto
Hi Ray,
Previously, I only ran the script for the 2 patches.
./devtools/validate-abi.sh HEAD
However when I run for v20.02 and HEAD, the list is quite big. I believe most
of them are either experimental or internal PMD. But cryptodev is still there.
NOTICE: abi-compliance-checker returned 1
N
>
> gcc 10 defaults to -fno-common and as a result when linking
> with crypto drivers:
>
> drivers/librte_pmd_dpaa_sec.a(crypto_dpaa_sec_dpaa_sec.c.o):
> (.bss+0x4): multiple definition of `rta_sec_era';
> drivers/librte_pmd_caam_jr.a(crypto_caam_jr_caam_jr.c.o):
> (.bss+0x0): first defined here
The reason for 1 mbuf is application design, the SDK should not drive
the application design.
Eg. in my case the poll loop is in control of another module which
calls a 'get work' function which expects to be returned a single mbuf
and therefore the simple way was to do poll of 1 mbuf and return it
Hi Akhil,
Thanks for the cleanup effort. OCTEON TX crypto PMDs would be moved to standard
test framework in the next release cycle. Hope that is fine. The patches are
looking good.
Series Acked-by: Anoob Joseph
> -Original Message-
> From: Akhil Goyal
> Sent: Sunday, May 10, 2020 4:4
+Xiaolong,
> -Original Message-
> From: Prashant Upadhyaya
> Sent: Monday, May 11, 2020 16:32
> To: Wang, Haiyue
> Cc: dev@dpdk.org
> Subject: Re: [dpdk-dev] Regarding rte_eth_rx_burst
>
> The reason for 1 mbuf is application design, the SDK should not drive
> the application design.
>
On Mon, May 11, 2020 at 12:29:17AM +0200, Thomas Monjalon wrote:
> 30/04/2020 18:01, Ciara Power:
> > This patch moves telemetry further down the build, and adds it as a
> > dependency for EAL. Telemetry V2 is now configured to build by default,
> > and the legacy support is built when the telemetr
Fix coverity defects of unused value.
Coverity issue: 357745, 357769
Fixes: b8b4c54ef9b0 ("net/iavf: support flexible Rx descriptor in normal path")
Signed-off-by: Leyi Rong
---
drivers/net/iavf/iavf_rxtx.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/net/iavf/iavf_rxtx.c b/d
On 09-May-20 12:25 AM, Stephen Hemminger wrote:
Compiling a C++ application that includes directly or indirectly
rte_common.h will cause a warning:
include/rte_common.h:350:37: warning: ISO C++17 does not allow ‘register’
storage class specifier [-Wregister]
rte_combine32ms1b(register uint32_
On Mon, May 11, 2020 at 09:56:10AM +0100, Burakov, Anatoly wrote:
> On 09-May-20 12:25 AM, Stephen Hemminger wrote:
> > Compiling a C++ application that includes directly or indirectly
> > rte_common.h will cause a warning:
> >
> > include/rte_common.h:350:37: warning: ISO C++17 does not allow ‘re
Updated SNOW3G and KASUMI PMD documentation guides
with information about the latest Intel IPSec Multi-buffer
library supported.
Signed-off-by: Pablo de Lara
---
doc/guides/cryptodevs/kasumi.rst | 6 +++---
doc/guides/cryptodevs/snow3g.rst | 6 +++---
doc/guides/rel_notes/release_20_
The latest version of the Intel IPSec Multi-buffer library
adds an API to authenticate multiple buffers in parallel.
The PMD is modified to use this API, improving
performance of the ZUC-EIA3 algorithm.
Signed-off-by: Pablo de Lara
---
doc/guides/cryptodevs/zuc.rst | 6 +--
doc/guides/
Check returned value after strtok()
CID 355674 (#1 of 1): Dereference null return value (NULL_RETURNS)
4. dereference: Dereferencing a pointer that might be NULL s when
calling inet_pton
Fixes: 103809d032cd ("app/test-fib: add test application for FIB")
Cc: sta...@dpdk.org
Signed-off-by: Vladimir
Explicitly check return value in add_specific()
CID 357760 (#2 of 2): Negative array index write (NEGATIVE_RETURNS)
8. negative_returns: Using variable ret as an index to array sad->cnt_arr
Fixes: b2ee26926775 ("ipsec: add SAD add/delete/lookup implementation")
Cc: sta...@dpdk.org
Signed-off-by:
On Sat, Apr 11, 2020 at 4:16 PM wrote:
[snip]
> +``rte_graph_node_get_by_name()`` APIs can be used to to get the
A script of mine (that usually has a lot of false positives..) caught
this "to to get".
If some proofreading happens, worth fixing at the same time.
Thanks.
--
David Marchand
> -Original Message-
> From: Akhil Goyal
> Sent: Sunday, 10 May, 2020 01:12
> To: dev@dpdk.org
> Cc: ruifeng.w...@arm.com; Doherty, Declan ;
> asoma...@amd.com; ano...@marvell.com; Zhang, Roy Fan
> ; Trahe, Fiona ;
> rnagadhee...@marvell.com; adwiv...@marvell.com; g.si...@nxp.com;
> hemant
On Mon, May 11, 2020 at 2:57 PM David Marchand
wrote:
>
> On Sat, Apr 11, 2020 at 4:16 PM wrote:
>
> [snip]
>
> > +``rte_graph_node_get_by_name()`` APIs can be used to to get the
>
> A script of mine (that usually has a lot of false positives..) caught
> this "to to get".
> If some proofreading h
On Mon, May 11, 2020 at 11:52 AM Sunil Kumar Kori wrote:
>
> NIX exposes NIX_AF_SMQ(0..511)_CFG to configure minimum length
> of the packet which is being used for zero padding if packet is
> less than configured value.
>
> Setting it to default minimum length i.e. 60 bytes.
>
> Fixes: ec8ddd4fb1b
> >> From: Pavan Nikhilesh
> >>
> >> Merge crc32 hash calculation public API headers for x86 and ARM,
> >> split implementations of x86 and ARM into their respective private
> >> headers.
> >> This reduces the ifdef code clutter while keeping current ABI intact.
> >>
> >> Although we install `rte_
Hi Akhil,
> -Original Message-
> From: Akhil Goyal
> Sent: Sunday, May 10, 2020 12:12 AM
> To: dev@dpdk.org
> Cc: ruifeng.w...@arm.com; Doherty, Declan ;
> asoma...@amd.com; ano...@marvell.com; Zhang, Roy Fan
> ; Trahe, Fiona ;
> rnagadhee...@marvell.com; adwiv...@marvell.com; g.si...@nxp
From: Pavan Nikhilesh
Move the internal symbols to INTERNAL sections so that any
change in them is not reported as ABI breakage.
Signed-off-by: Pavan Nikhilesh
---
drivers/common/octeontx2/otx2_common.h | 8
drivers/common/octeontx2/otx2_dev.h | 3 +++
drivers
From: Pavan Nikhilesh
Move the internal symbols to INTERNAL sections so that any
change in them is not reported as ABI breakage.
Signed-off-by: Pavan Nikhilesh
---
drivers/mempool/octeontx2/otx2_mempool.h| 2 ++
drivers/mempool/octeontx2/rte_mempool_octeontx2_version.map |
The value MLX5_WQE_BUF_ALIGNMENT is defined as 512.
In some cases this alignment size is not adequate, which results in
memory registration that is not accepted by FW.
The result error can be "page_offset is not aligned to page_size/64,
bad umem_offset" (syndrome 0x357275).
This patch updates the
Hi Pablo,
>
> Hi Akhil,
>
> >
> > Some wireless algos like SNOW, ZUC may support input data in bits which are
> > not byte aligned. However, not all PMDs can support this requirement. Hence
> > added a new feature flag RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
> > to identify which all PMDs can supp
From: Pavan Nikhilesh
Add device arguments to lock NPA aura and pool contexts in NDC cache.
The device args take hexadecimal bitmask where each bit represent the
corresponding aura/pool id.
Example:
-w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx
Signed-off-by: Pavan Nikh
> > Some wireless algos like SNOW, ZUC may support input data in bits which are
> > not byte aligned. However, not all PMDs can support this requirement.
> > Hence added a new feature flag
> > RTE_CRYPTODEV_FF_NON_BYTE_ALIGNED_DATA
> > to identify which all PMDs can support non-byte aligned data.
>
W dniu 09.05.2020 o 23:47, Akhil Goyal pisze:
>> After re-enabling checks for non-implemneted ops in non-debug mode
>> in librte_security set_pkt_metadata and get_userdata functions,
>> tests verifying proper work of tests can be enabled also.
>>
>> Signed-off-by: Lukasz Wojciechowski
>> ---
> A
W dniu 09.05.2020 o 23:58, Akhil Goyal pisze:
> Hi Lukasz,
>
> Thanks for the detailed analysis.
> Series
> Acked-by: Akhil Goyal
>
> Applied to dpdk-next-crypto
>
> Thanks.
I am a fan of big commit messages. Just let me know when I'll cross the
line withe these novels ;)
Thank you
>> This patc
This patch adds test vectors for AES-256 and sets QAT as the
target PMD.
Signed-off-by: Mairtin o Loingsigh
Acked-by: Fiona Trahe
---
app/test/test_cryptodev_aes_test_vectors.h | 176 +
1 file changed, 176 insertions(+)
diff --git a/app/test/test_cryptodev_aes_test_
Update QAT pmd to support AES-256 DOCSIS
Signed-off-by: Mairtin o Loingsigh
---
doc/guides/rel_notes/release_20_05.rst | 4
1 file changed, 4 insertions(+)
diff --git a/doc/guides/rel_notes/release_20_05.rst
b/doc/guides/rel_notes/release_20_05.rst
index 82df72c2b..ee494f7aa 100644
--- a/
>
> W dniu 09.05.2020 o 23:58, Akhil Goyal pisze:
> > Hi Lukasz,
> >
> > Thanks for the detailed analysis.
> > Series
> > Acked-by: Akhil Goyal
> >
> > Applied to dpdk-next-crypto
> >
> > Thanks.
> I am a fan of big commit messages. Just let me know when I'll cross the
> line withe these novels ;
This patch adds support for DOCSIS AES-256 when using qat
Signed-off-by: Mairtin o Loingsigh
Acked-by: Fiona Trahe
---
drivers/crypto/qat/qat_sym_capabilities.h | 4 ++--
drivers/crypto/qat/qat_sym_session.c | 12 ++--
2 files changed, 12 insertions(+), 4 deletions(-)
diff --git
>> >> From: Pavan Nikhilesh
>> >>
>> >> Merge crc32 hash calculation public API headers for x86 and ARM,
>> >> split implementations of x86 and ARM into their respective private
>> >> headers.
>> >> This reduces the ifdef code clutter while keeping current ABI
>intact.
>> >>
>> >> Although we inst
Now that kernel modules aren't built by default, we can be more
strict with their build process, and fail the build if they were
requested to be built, but weren't.
Signed-off-by: Anatoly Burakov
---
kernel/linux/meson.build | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git
On Mon, May 11, 2020 at 11:25:13AM +0100, Anatoly Burakov wrote:
> Now that kernel modules aren't built by default, we can be more
> strict with their build process, and fail the build if they were
> requested to be built, but weren't.
>
> Signed-off-by: Anatoly Burakov
> ---
I think erroring out
>
> >> >> From: Pavan Nikhilesh
> >> >>
> >> >> Merge crc32 hash calculation public API headers for x86 and ARM,
> >> >> split implementations of x86 and ARM into their respective private
> >> >> headers.
> >> >> This reduces the ifdef code clutter while keeping current ABI
> >intact.
> >> >>
>
>
> The latest version of the Intel IPSec Multi-buffer library
> adds an API to authenticate multiple buffers in parallel.
> The PMD is modified to use this API, improving
> performance of the ZUC-EIA3 algorithm.
>
> Signed-off-by: Pablo de Lara
> ---
Series
Applied to dpdk-next-crypto
Thanks.
> > This patch adds missing line about addition of AES-GCM/GMAC J0 capability
> > to 20.05 release notes.
> >
> > Fixes: 2165e2e9ea56 ("crypto/qat: support AES-GCM J0")
> >
> > Signed-off-by: Arek Kusztal
>
> Acked-by: Adam Dybkowski
Applied to dpdk-next-crypto
Thanks.
Signed-off-by: Mattias Rönnblom
---
doc/guides/rel_notes/release_20_05.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/doc/guides/rel_notes/release_20_05.rst
b/doc/guides/rel_notes/release_20_05.rst
index 82df72c2b..bf80c0563 100644
--- a/doc/guides/rel_notes/release_20_05.rs
>> >> >> From: Pavan Nikhilesh
>> >> >>
>> >> >> Merge crc32 hash calculation public API headers for x86 and
>ARM,
>> >> >> split implementations of x86 and ARM into their respective
>private
>> >> >> headers.
>> >> >> This reduces the ifdef code clutter while keeping current ABI
>> >intact.
>> >>
>
> >
> > Get rid of hardcoded limit of cryptodev sessions.
> >
> > Fixes: e1143d7dbbf4 ("examples/ipsec-secgw: get rid of maximum SA
> limitation")
> > Cc: vladimir.medved...@intel.com
> >
> > Signed-off-by: Vladimir Medvedkin
> > ---
> Tested-by: Konstantin Ananyev
> Acked-by: Konstantin Ana
Add flow performance application skeleton.
Signed-off-by: Wisam Jaddo
---
MAINTAINERS| 5 +
app/Makefile | 1 +
app/meson.build| 1 +
app/test-flow-perf/Makefile| 23 +++
app/test-flow-perf/config.h
Add insertion rate calculation feature into flow
performance application.
The application now provide the ability to test
insertion rate of specific rte_flow rule, by
stressing it to the NIC, and calculate the
insertion rate.
The application offers some options in the command
line, to configure w
Add new application to test rte flow performance from:
- Insertion rate.
- Deletion rate.
- Memory consumption.
- PPS forward measurement.
---
v6:
* Move compare vs 0 logic instead of logical not.
* Logged errors into stderr.
* Remove offload parse on queue level.
* Fix documentation and limitatio
> Explicitly check return value in add_specific()
> CID 357760 (#2 of 2): Negative array index write (NEGATIVE_RETURNS)
> 8. negative_returns: Using variable ret as an index to array sad->cnt_arr
>
> Fixes: b2ee26926775 ("ipsec: add SAD add/delete/lookup implementation")
> Cc: sta...@dpdk.org
>
>
Add the ability to test deletion rate for flow performance
application.
This feature is disabled by default, and can be enabled by
add "--deletion-rate" in the application command line options.
Signed-off-by: Wisam Jaddo
---
app/test-flow-perf/main.c | 87 ++
Introduce new feature to dump memory statistics of each socket
and a total for all before and after the creation.
This will give two main advantage:
1- Check the memory consumption for large number of flows
"insertion rate scenario alone"
2- Check that no memory leackage after doing insertion the
Introduce packet forwarding support to the app to do
some performance measurements.
The measurements are reported in term of packet per
second unit. The forwarding will start after the end
of insertion/deletion operations.
The support has single and multi performance measurements.
Signed-off-by:
Add insertion rate calculation feature into flow
performance application.
The application now provide the ability to test
insertion rate of specific rte_flow rule, by
stressing it to the NIC, and calculate the
insertion rate.
The application offers some options in the command
line, to configure w
Introduce new feature to dump memory statistics of each socket
and a total for all before and after the creation.
This will give two main advantage:
1- Check the memory consumption for large number of flows
"insertion rate scenario alone"
2- Check that no memory leackage after doing insertion the
Add new application to test rte flow performance from:
- Insertion rate.
- Deletion rate.
- Memory consumption.
- PPS forward measurement.
---
v6:
* Move compare vs 0 logic instead of logical not.
* Logged errors into stderr.
* Remove offload parse on queue level.
* Fix documentation and limitatio
Add the ability to test deletion rate for flow performance
application.
This feature is disabled by default, and can be enabled by
add "--deletion-rate" in the application command line options.
Signed-off-by: Wisam Jaddo
---
app/test-flow-perf/main.c | 87 ++
Add flow performance application skeleton.
Signed-off-by: Wisam Jaddo
---
MAINTAINERS| 5 +
app/Makefile | 1 +
app/meson.build| 1 +
app/test-flow-perf/Makefile| 23 +++
app/test-flow-perf/config.h
Introduce packet forwarding support to the app to do
some performance measurements.
The measurements are reported in term of packet per
second unit. The forwarding will start after the end
of insertion/deletion operations.
The support has single and multi performance measurements.
Signed-off-by:
On Wed, May 6, 2020 at 7:15 PM Harry van Haaren
wrote:
>
> This commit adds a basic test to check the cycle cost
> of related to calling into a service.
>
> Signed-off-by: Harry van Haaren
Tested-by: Phil Yang
Reviewed-by: Phil Yang
Restored output to v1 format following Phil comment.
Applie
> > Explicitly check return value in add_specific()
> > CID 357760 (#2 of 2): Negative array index write (NEGATIVE_RETURNS)
> > 8. negative_returns: Using variable ret as an index to array sad->cnt_arr
> >
> > Fixes: b2ee26926775 ("ipsec: add SAD add/delete/lookup implementation")
> > Cc: sta...
On Wed, May 6, 2020 at 5:28 PM Phil Yang wrote:
>
> The rte_atomic ops and rte_smp barriers enforce DMB barriers on aarch64.
> Using c11 atomics with explicit memory ordering instead of the rte_atomic
> ops and rte_smp barriers for inter-threads synchronization can uplift the
> performance on aarc
Bugzilla ID: 437
Cc: dev@dpdk.org
Cc: sta...@dpdk.org
Cc: bruce.richard...@intel.com
Cc: vipin.vargh...@intel.com
Cc: jgraj...@cisco.com
Signed-off-by: Muhammad Bilal
---
examples/l2fwd/main.c | 72 ++-
1 file changed, 57 insertions(+), 15 deletions(-)
dif
> > > > > > > > > >
> > > > > > > > > > > Hi Konstantin,
> > > > > > > > > > > I like the way the tests are organized and it looks
> > good.
> > > > > > > > > > >
> > > > > > > > > > > I am just wondering about the way it is being tested here.
> > > > > > > > > > > The intent to write the test ca
Hi Ray,
I have applied the series on dpdk-next-crypto as per your validation of ABI.
Thomas,
Please validate this series at your end before applying to master. I am not too
sure on the ABI stuff.
Regards,
Akhil
> -Original Message-
> From: Akhil Goyal
> Sent: Monday, May 11, 2020 1:48
The following changes since commit 205032bbfcf09a1fd9bea715eafb5c97ca73772c:
service: relax barriers with C11 atomics (2020-05-11 13:21:54 +0200)
are available in the Git repository at:
http://dpdk.org/git/next/dpdk-next-crypto
for you to fetch changes up to 6488cc1cfac29633b6d0b646e8e76b4
Hi,
> -Original Message-
> From: Raslan Darawsheh
> Sent: Wednesday, May 6, 2020 9:58 AM
> To: Slava Ovsiienko ; Matan Azrad
>
> Cc: dev@dpdk.org; Ori Kam ; sta...@dpdk.org
> Subject: [PATCH v4] net/mlx5: fix matching for UDP tunnels with verbs
>
> When creating flow rule with zero spec
Update release notes with recent DSW event device improvements.
Signed-off-by: Mattias Rönnblom
---
doc/guides/rel_notes/release_20_05.rst | 10 ++
1 file changed, 10 insertions(+)
diff --git a/doc/guides/rel_notes/release_20_05.rst
b/doc/guides/rel_notes/release_20_05.rst
index 82df72
On 5/11/20 2:09 PM, Wisam Jaddo wrote:
> Add flow performance application skeleton.
>
> Signed-off-by: Wisam Jaddo
Reviewed-By: Andrew Rybchenko
On 5/11/20 2:09 PM, Wisam Jaddo wrote:
> Add insertion rate calculation feature into flow
> performance application.
>
> The application now provide the ability to test
> insertion rate of specific rte_flow rule, by
> stressing it to the NIC, and calculate the
> insertion rate.
>
> The applicatio
Hi,
> -Original Message-
> From: De Lara Guarch, Pablo
> Sent: Monday, May 11, 2020 10:14 AM
> To: akhil.go...@nxp.com
> Cc: dev@dpdk.org; De Lara Guarch, Pablo
> Subject: [PATCH v3 1/2] crypto/zuc: support IPSec Multi-buffer lib v0.54
>
> The latest version of the Intel IPSec Multi-bu
>
> >> >> >> From: Pavan Nikhilesh
> >> >> >>
> >> >> >> Merge crc32 hash calculation public API headers for x86 and
> >ARM,
> >> >> >> split implementations of x86 and ARM into their respective
> >private
> >> >> >> headers.
> >> >> >> This reduces the ifdef code clutter while keeping current AB
>> >> >> >> From: Pavan Nikhilesh
>> >> >> >>
>> >> >> >> Merge crc32 hash calculation public API headers for x86 and
>> >ARM,
>> >> >> >> split implementations of x86 and ARM into their respective
>> >private
>> >> >> >> headers.
>> >> >> >> This reduces the ifdef code clutter while keeping curre
Hi,
> -Original Message-
> From: dev On Behalf Of Michael Baum
> Sent: Wednesday, May 6, 2020 7:24 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Slava Ovsiienko
> ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/mlx5: fix meter color register consideration
>
> The mlx5_flow_get_reg_id() f
Hi Mairtin,
I believe your patch is not rebased on top of current tree. There is no
pmd_mask now.
Also, I see that the AES 256 cases are already there. This patch is already
there I guess.
> static const uint8_t
> cipher_aescbc_offset_16[] = {
> 0x57, 0x68, 0x61, 0x74, 0x20, 0x61, 0x20
W dniu 11.05.2020 o 12:20, Akhil Goyal pisze:
>> W dniu 09.05.2020 o 23:58, Akhil Goyal pisze:
>>> Hi Lukasz,
>>>
>>> Thanks for the detailed analysis.
>>> Series
>>> Acked-by: Akhil Goyal
>>>
>>> Applied to dpdk-next-crypto
>>>
>>> Thanks.
>> I am a fan of big commit messages. Just let me know
>
> Update QAT pmd to support AES-256 DOCSIS
>
> Signed-off-by: Mairtin o Loingsigh
> ---
Release note should be part of the patch which is supporting the feature.
I believe this patch is already applied. Why is it recent?
telemetry can not depend on EAL anymore but it still wants to get arch
headers.
We directly point at the right source directories by using the same logic
than EAL. However the special case of armv7 has been missed.
Fix this by defaulting ARCH_DIR to RTE_ARCH.
Caught on OBS:
[ 162s] SYMLINK-FIL
Hi,
> -Original Message-
> From: dev On Behalf Of Michael Baum
> Sent: Wednesday, May 6, 2020 7:28 PM
> To: dev@dpdk.org
> Cc: Matan Azrad ; Slava Ovsiienko
> ; sta...@dpdk.org
> Subject: [dpdk-dev] [PATCH] net/mlx4: fix drop queue mem alloc failure
> handle
>
> The function mlx4_drop_get
An issue has been observed where epoll file descriptor
list rebuilds every time an interrupt/alarm event is
received.
eal_intr_process_interrupts() should notify pipe fd only
if any source is removed from the source list i.e (rv > 0)
Fixes: 0c7ce182a760 ("eal: add pending interrupt callback unreg
On Mon, May 11, 2020 at 03:32:12PM +0200, David Marchand wrote:
> telemetry can not depend on EAL anymore but it still wants to get arch
> headers.
> We directly point at the right source directories by using the same logic
> than EAL. However the special case of armv7 has been missed.
>
No object
Hi,
> -Original Message-
> From: Alexander Kozyrev
> Sent: Wednesday, May 6, 2020 9:11 PM
> To: dev@dpdk.org
> Cc: sta...@dpdk.org; Raslan Darawsheh ; Slava
> Ovsiienko ; Matan Azrad
>
> Subject: [PATCH] net/mlx5: fix TxQ release debug log timing
>
> Program received signal SIGSEGV, Segm
On Mon, May 11, 2020 at 3:47 PM Bruce Richardson
wrote:
>
> On Mon, May 11, 2020 at 03:32:12PM +0200, David Marchand wrote:
> > telemetry can not depend on EAL anymore but it still wants to get arch
> > headers.
> > We directly point at the right source directories by using the same logic
> > than
These are the patches for QAT AES-256 DOCSIS along with the documentation
update (which was missing from previous version)
Regards,
Mairtin
-Original Message-
From: Akhil Goyal
Sent: Monday, May 11, 2020 2:14 PM
To: O'loingsigh, Mairtin ; Trahe, Fiona
Cc: dev@dpdk.org
Subject: RE: [P
On Mon, May 11, 2020 at 03:58:47PM +0200, David Marchand wrote:
> On Mon, May 11, 2020 at 3:47 PM Bruce Richardson
> wrote:
> >
> > On Mon, May 11, 2020 at 03:32:12PM +0200, David Marchand wrote:
> > > telemetry can not depend on EAL anymore but it still wants to get arch
> > > headers.
> > > We d
Hi,
> -Original Message-
> From: Dekel Peled
> Sent: Wednesday, May 6, 2020 8:14 PM
> To: Matan Azrad ; Slava Ovsiienko
> ; Raslan Darawsheh
> Cc: dev@dpdk.org
> Subject: [PATCH] net/mlx5: support match on GTP flags
>
> This patch adds to MLX5 PMD the support of matching on
> GTP header
07/05/2020 17:36, Thomas Monjalon:
> 07/05/2020 15:54, Jerin Jacob:
> > On Mon, May 4, 2020 at 6:56 PM wrote:
> > >
> > > From: Jerin Jacob
> > >
> > > Some machines may have a lot of PCI devices and all of them are
> > > not bound to DPDK. In such case the logs from EAL creates a lot of
> > > cl
Hi Akhil,
> -Original Message-
> From: Akhil Goyal
> Sent: Monday, May 11, 2020 11:05 AM
> To: De Lara Guarch, Pablo ; dev@dpdk.org
> Cc: ruifeng.w...@arm.com; Doherty, Declan ;
> asoma...@amd.com; ano...@marvell.com; Zhang, Roy Fan
> ; Trahe, Fiona ;
> rnagadhee...@marvell.com; adwiv...@
11/05/2020 12:00, pbhagavat...@marvell.com:
> From: Pavan Nikhilesh
>
> Move the internal symbols to INTERNAL sections so that any
> change in them is not reported as ABI breakage.
>
> Signed-off-by: Pavan Nikhilesh
> ---
> drivers/common/octeontx2/otx2_common.h | 8
> driv
The AVX512 packed ring datapath selection was only done
at build time, but it should also be checked at runtime
that the CPU supports it.
This patch add a CPU flags check so that non-vectorized
path is selected at runtime if AVX512 is not supported.
Fixes: ccb10995c2ad ("net/virtio: add election
On Thu, May 7, 2020 at 10:03 AM Bing Zhao wrote:
>
> The size checking is done in the caller. The size parameter is an
> unsigned (64b wide) right now, so the comparison with zero should be
> enough in most cases. But it won't help in the following case.
> If the allocating request input a huge nu
On Wed, May 6, 2020 at 2:43 PM David Marchand wrote:
>
> rte_pci_probe() is private to the PCI bus.
> Clean the remaining references in the documentation and comments.
>
> Fixes: c752998b5e2e ("pci: introduce library and driver")
> Cc: sta...@dpdk.org
>
> Signed-off-by: David Marchand
Reviewed-b
On Sat, May 2, 2020 at 9:42 AM Sunil Kumar Kori wrote:
>
> rte_bus_scan API scans all the available PCI devices irrespective of white
> or black listing parameters then further devices are probed based on white
> or black listing parameters. So unnecessary CPU cycles are wasted during
> rte_pci_sc
05/05/2020 18:07, Bruce Richardson:
> On Wed, Apr 29, 2020 at 01:29:30PM +0100, Radu Nicolau wrote:
> > Add support for Ice Lake IOAT DMA engine PCI Device ID.
> >
> > Signed-off-by: Radu Nicolau
> > ---
> > v2: squash commits, add description.
> >
> > drivers/raw/ioat/ioat_rawdev.c | 2 ++
> >
Caught while running testpmd:
No telemetry legacy support- No legacy callbacks, legacy socket not
createdInteractive-mode selected
Add missing \n.
Fixes: 6dd571fd07c3 ("telemetry: introduce new functionality")
Signed-off-by: David Marchand
---
lib/librte_telemetry/telemetry.c | 8
1
On 5/11/2020 3:47 PM, Maxime Coquelin wrote:
> The AVX512 packed ring datapath selection was only done
> at build time, but it should also be checked at runtime
> that the CPU supports it.
>
> This patch add a CPU flags check so that non-vectorized
> path is selected at runtime if AVX512 is not su
On Mon, May 11, 2020 at 3:32 PM David Marchand
wrote:
>
> telemetry can not depend on EAL anymore but it still wants to get arch
> headers.
> We directly point at the right source directories by using the same logic
> than EAL. However the special case of armv7 has been missed.
>
> Fix this by def
Can be reproduced with "make EXTRA_CFLAGS='-O1'" command using
gcc (GCC) 9.3.1 20200408 (Red Hat 9.3.1-2)
Two build errors:
1)
In file included from .../build/include/rte_ring_elem.h:1093,
from .../lib/librte_rcu/rte_rcu_qsbr.c:21:
../lib/librte_rcu/rte_rcu_qsbr.c: In function ‘rt
Can be reproduced with "make EXTRA_CFLAGS='-O1'" command using
gcc (GCC) 9.3.1 20200408 (Red Hat 9.3.1-2)
Build error:
In file included from .../drivers/mempool/octeontx2/otx2_mempool.h:13,
from .../drivers/mempool/octeontx2/otx2_mempool_ops.c:8:
.../drivers/mempool/octeontx2/otx2_
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