> -Original Message-
> From: Chas Williams [mailto:3ch...@gmail.com]
> > + */
> > +#ifndef RTE_AVP_ALIGNMENT
> > +#define RTE_AVP_ALIGNMENT 64
> > +#endif
>
> This is already provided by DPDK as CONFIG_RTE_CACHE_LINE_SIZE
We took another look at our usage of this. We need it for another
On Wed, 2017-03-01 at 19:19 -0500, Allain Legacy wrote:
> +
> +/**
> + * Memory aligment (cache aligned)
Spelling -- alignment.
> + */
> +#ifndef RTE_AVP_ALIGNMENT
> +#define RTE_AVP_ALIGNMENT 64
> +#endif
This is already provided by DPDK as CONFIG_RTE_CACHE_LINE_SIZE
> + * Defines the number o
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