> > +#ifndef RTE_AVP_ALIGNMENT
> > +#define RTE_AVP_ALIGNMENT 64
>
> I think we use RTE_CACHE_LINE_SIZE here? PPC and ThunderX1 targets are
> cache line size of 128B
We need this to stay aligned with our host compile environment so we are going
to retain this as a local value instead of relying o
On Sun, Feb 26, 2017 at 02:08:50PM -0500, Allain Legacy wrote:
> Adds public/exported header files for the AVP PMD. The AVP device is a
> shared memory based device. The structures and constants that define the
> method of operation of the device must be visible by both the PMD and the
> host DPD
Adds public/exported header files for the AVP PMD. The AVP device is a
shared memory based device. The structures and constants that define the
method of operation of the device must be visible by both the PMD and the
host DPDK application. They must not change without proper version
controls an
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