> > +#ifndef RTE_AVP_ALIGNMENT
> > +#define RTE_AVP_ALIGNMENT 64
> 
> I think we use RTE_CACHE_LINE_SIZE here? PPC and ThunderX1 targets are
> cache line size of 128B
We need this to stay aligned with our host compile environment so we are going 
to retain this as a local value instead of relying on the RTE define.

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