Hi,
> -Original Message-
> From: Alexander Kozyrev
> Sent: Sunday, November 15, 2020 4:26 PM
> To: dev@dpdk.org
> Cc: sta...@dpdk.org; Raslan Darawsheh ; Dekel Peled
> ; Matan Azrad
> Subject: [PATCH] net/mlx5: fix packet padding config for RxQ via DevX
>
> Received packets can be align
Received packets can be aligned to the size of the cache line on
PCI transactions. This could improve performance by avoiding
partial cache line writes in exchange for increased PCI bandwidth.
This feature is supposed to be controlled by the rxq_pkt_pad_en
devarg and it is true for an RxQ created
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