this great
performance quad core laptop ( Chromebook is not even close at
performance, as far as I know )
Best regards,
Mike Banon
On Wed, May 31, 2017 at 11:03 AM, Paul Kocialkowski wrote:
> Hi,
>
> Le mardi 23 mai 2017 à 08:54 +0200, Paul Menzel a écrit :
>> I am looking for a new por
and although it is
3 years old, the latest proprietary BIOS for G505S is even older, so its OK
Best regards,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
This page from coreboot's official wiki - [1] - describes 5 ways to
extract VGABIOS. However, all these ways are either unsuitable for AMD
AtomBIOS extraction at all - or do not work for laptop's discrete AMD GPU
*** [1] https://www.coreboot.org/VGA_support#How_to_retrieve_a_good_video_bios
Let's
re is no way to
determine which bytes come from RAM and which ones from the page file.
Best regards,
Mike Banon
On Sat, Jul 8, 2017 at 10:56 PM, Peter Stuge wrote:
> Nico Huber wrote:
>> > 0x42D3B3000 - working integrated graphics ROM !!!
>> >
>> > 0x42D305020 - wo
7;s cbfstool.sh script - two
missing "\" characters at the end of line. g505s-atombios repository
has a working version
Have the great weekends and happy hacking ;-)
Wish you all the best,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
tributing them. Multiple times I
have honestly tried to contact both Compal and ENE asking them if they
don't mind me sharing the datasheets, but they have never replied to me
Good luck to your projects,
Mike Banon
On Sat, Jul 15, 2017 at 6:24 AM, Damien Zammit wrote:
> Dear Mike,
>
>
with your home repository at git.code.paulk.fr ?
What do you think about this idea?
Best regards,
Mike Banon
On Sat, Jul 15, 2017 at 6:58 PM, Paul Kocialkowski wrote:
> Hey,
>
> Le samedi 15 juillet 2017 à 16:53 +0300, Mike Banon a écrit :
>> Dear Damien, thank you for your intere
y attach/detach the UART
without soldering/desoldering it each time ; meanwhile I'll have to
use something like a Morse code for these leds :)
Best regards,
Mike Banon
On Sun, Jul 16, 2017 at 11:26 AM, Paul Kocialkowski wrote:
> Le dimanche 16 juillet 2017 à 11:10 +0300, Mike Banon
-specific bits).
I understand that this seems unnecessary (and maybe even
counter-productive) if you believe that modesetting is trivial, but I
don't know how to reconcile your views on modesetting with the views
of developers working on the code at different vendors. Once we figure
out how to
D 8650G belongs)
Wonder what are the remaining 5% ;-)
On Fri, Jan 12, 2018 at 1:16 PM, Nico Huber wrote:
> Hi,
>
> On 12.01.2018 10:51, Mike Banon wrote:
>> Hi Nico,
>>
>>>
>>> you seem to be misinformed about the G505s. There is no
>>> open-source g
Hi Nico and Paul, and Lenovo G505S owners/developers,
I have ported the patches by Paul Kocialkowski to the latest flashrom
sources of master branch (earlier there were incompatibilities) --
making it possible to flash KB9012 EC controller [found in Lenovo
G505S AMD coreboot-supported laptop (no A
Hi friend ! I just googled "coreboot servers" and found this:
https://store.vikings.net/the-server-1u , and
https://www.siliconmechanics.com/i7045/opteron-server.php
(Installation of coreboot is available with certain configurations;
contact Sales for details.)
And, of course, Talos II POWER9 ser
ftware. Maybe the direct hardware flashing is also
possible for you
Latest status update for Origami-EC firmware:
https://www.mail-archive.com/coreboot@coreboot.org/msg50646.html
Best regards,
Mike Banon
On Mon, Feb 5, 2018 at 9:47 PM, Youness Alaoui
wrote:
> Hi Marty,
>
> Unfortunat
While building a coreboot now I'm getting this "kasten.core" message
(see below), it wasn't like that earlier! Tried to search through all
the coreboot sources with ' find . -type f -print0 | xargs -0 grep
"kasten" ' but no results! So thats not a new coreboot build script.
It almost looks like ins
Looks like there was the old hidden window of okteta hex editor that I
forgot to close, and for each rebuild of coreboot.rom okteta's core
printed these spooky messages :P Sorry for the false alarm...
(although its never wrong to be on high alert)
On Sat, Feb 10, 2018 at 10:52 PM, Mike
e date for the microcode updates for fam15 AMD CPUs
(so a request is not about "opterons only")
On Sun, Feb 18, 2018 at 2:47 PM, Mike Banon wrote:
> Maybe its' a good idea to write to AMD support regarding this question
> - please share a reply if you would get an answer.
call "malloc_" from
inside the "cbfs_copyfile" function --- void *temp =
malloc_tmphigh(size); --- but we couldn't call there our testfunc()
which calls "malloc_" without running into this problem?
Best regards,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
> Any particular reason those patches were not upstreamed?
Because a person who submitted these patches did not fix some problems,
if you scroll down to comments at
https://review.coreboot.org/#/c/coreboot/+/19820/
Paul Menzel
May 23, 2017
Patch Set 1:
(2 comments)
src/mainboard/asus/kgpe-d16/
just upgrade your git? 1.9.1 is a little bit old
Although I am unsure if there is anything newer for ubuntu 14.04
since it is very outdated and everyone switched to 16.04 LTS or later.
Maybe you would have to compile a new git from source if you don't
want / can't reinstall OS
On Sat, Feb 24, 2018
settings, "emulation/qemu-i440fx" target
Best regards,
Mike
On Sun, Feb 25, 2018 at 11:55 AM, Paul Menzel wrote:
> Dear Mike,
>
>
> Am 25.02.2018 um 01:05 schrieb Mike Banon:
>>
>> Friends, I need your help. While trying to improve SeaBIOS I got stuck
>&g
Sun, Feb 25, 2018 at 5:41 PM, Kevin O'Connor wrote:
> On Sun, Feb 25, 2018 at 03:05:06AM +0300, Mike Banon wrote:
>> Friends, I need your help. While trying to improve SeaBIOS I got stuck
>> at this very strange problem - which does not appear when you do a
>> standalone b
g the 1st board into master PC
(coreboot-PC-under-debug) USB 2.0 port and the 2nd board into slave PC
(another coreboot PC which will be logging the debug info)
Please tell me: could this setup work in theory, or there are obvious
shortcomings that could prevent it from working?
Best regards,
Mike
erousPrototypes wiki
Will write an update when I'd get the boards and test them with AMD
G505S laptop. I'm curious what Lenovo G505S is writing to the coreboot
log while it boots
Best regards,
Mike Banon
On Sat, Mar 3, 2018 at 4:57 PM, Kyösti Mälkki wrote:
> Hi Mike
>
> On Sat,
f the parameters is way less important.
>
> -vb
>
>
> On Sat, Mar 3, 2018 at 5:27 AM, Mike Banon wrote:
>>
>> Good day! I am looking for the dirt cheap EHCI debug dongle. Initially
>> I found these instructions for FX2LP -
>> https://www.coreboot.org/DIY
Thank you for your results, Georg! Although this "adafruit board"
costs twice more ( $15 ) and has a microUSB instead of a sturdy
full-sized one, your report gives me more confidence in the success of
the idea. Perhaps this information could be somehow included to the
coreboot wiki, especially to t
ed ) - quite a low
failure rate. These boards are very simple and their failure rate
mostly depends on the failure rate of FTDI chips and their soldering
quality
> It writes just the same you get with cbmem -c utility, assuming you
can reach OS on the DUT.
Didn't know that, but its' to
> otherwise, the EC prevents us from accessing it
Maybe KB3940Q has the same protection as KB9012 : unless the EC's
ground pin has been shortened with motherboard's ground _before_ you
have powered a motherboard, you would not have any access; otherwise,
EC will go into debug mode and you'll have t
cal changes (except the
board_status.sh but that happened much later). Did not like that
"-dirty" as it was unfair, and fixed the already-submitted board
status to become clean with a follow-up commit. Know thats a bit of
cheating, but though it was OK to do in such a situation, as I have
not modified anything at the sources that could have changed the
working status of that build
Best regards,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
#x27;s interest?
(MSR C001_1029[1]=1) Maybe that MSR write would even be a C code
1-liner?
Best regards,
Mike Banon
On Tue, Apr 10, 2018 at 3:32 AM, Arthur Heymans wrote:
> Hi
>
> Linux already does that for you: (v4.16) arch/x86/kernel/cpu/amd.c line 869.
>
>
> Kind regards
>
the standalone microcode updates?
Best regards,
Mike Banon
On Thu, Apr 12, 2018 at 11:01 AM, taii...@gmx.com wrote:
> AMD kept their promise.
> https://www.bleepingcomputer.com/news/hardware/amd-releases-spectre-v2-microcode-updates-for-cpus-going-back-to-2011/
--
coreboot mailing list:
Regarding Lenovo G505S - also AMD family 15h : the very recent (April
08/09) build of coreboot
(for which I have submitted a board status) - gave me the assertion
errors as well:
...
BS: BS_DEV_INIT times (us): entry 0 run 718163 exit 0
Finalize devices...
Devices finalized
APIC 00: ** Enter AmdIn
- AMD Family 16h KB (AGESA) - 2017-08-24
Biostar AM1ML - AMD Family 16h KB (AGESA) - 2015-04-13
Jetway NF81-T56N-LF - AMD Family 14h (AGESA) - 2014
After you will submit your report, it will be mentioned at this page
in about 1 hour: https://www.coreboot.org/Supported_Motherboards
Best regards,
Mike
complain a lot
On Sun, Apr 29, 2018 at 8:56 AM, Raphaël Jacquot wrote:
>
>
> On 28/04/2018 14:37, Mike Banon wrote:
>>
>> There are a lot of nice AMD-based coreboot-supported boards which have
>> an outdated board_status and are at risk of removal. The majority o
? I have Lenovo G505S coreboot-supported laptop with AMD
Richland 15h CPU (A10-5750M) and it is probably using this IMC blob -
thats why I am curious
[1] - https://www.coreboot.org/AMD_IMC
Best regards,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman
; why only 15h and 17h are being updated while 16h is
forgotten - I could not understand, and this is relevant since there
are some coreboot-supporting 16h boards)
Best regards,
Mike Banon
On Sat, May 26, 2018 at 7:13 PM, Rudolf Marek wrote:
> Hi again,
>
> Dne 23.5.2018 v 21:52 Rudolf
ncept. It was never anything else. I was
> just
> able to run some program and that was all.
>
> Please make sure your IMC is active using info on wiki page. I suspect
> usually it wasnt used as laptop EC.
>
> Thanks
> Rudolf
>
>
>
>
> Dne 25.5.2018 v 14:31 Mi
[4] link should be https://raptorcs.com/content/TLSDS2/intro.html ( "
TLSDSS " is not working )
On Fri, Aug 3, 2018 at 1:36 AM, Timothy Pearson
wrote:
> -BEGIN PGP SIGNED MESSAGE-
> Hash: SHA256
>
> On 06/12/2018 01:14 PM, Timothy Pearson wrote:
>> As of late last week:
>>
>> W have the p
Have you tried repairing the bootloader at your hard drive?
are you using GRUB2, and your partitions are MBR or GPT?
(SeaBIOS supports MBR only, so GRUB2 needs to be installed to MBR)
On Tue, Aug 7, 2018 at 11:13 AM, zahra rahimkhani
wrote:
> Hello friends
>
> I compiled coreboot and seabios base
On Tue, Aug 7, 2018 at 11:40 PM zahra rahimkhani
wrote:
>
> Thank you very much for your help.
> could you tell me how to repairhatd driver ?
>
> Thanks ,
>
> On 07/08/2018 7:59 PM, "Mike Banon" wrote:
>>
>> Have you tried repairing the bootloader at you
n you could try restoring GRUB2, by following
these instructions for example -
https://howtoubuntu.org/how-to-repair-restore-reinstall-grub-2-with-a-ubuntu-live-cd
Best regards,
Mike Banon
On Wed, Aug 8, 2018 at 10:56 AM, zahra rahimkhani
wrote:
> Also, I got a grub2 alone on flash .
> it is
h which is addressing those
problems, but before I do that I would like to hear your thoughts
Best regards,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
change's comments -
https://review.coreboot.org/c/coreboot/+/28204
[yes, my long cc list was a mistake, maybe thats why it didn't pass
the mailing list moderation]
On Sat, Aug 18, 2018 at 2:49 AM, awokd wrote:
> On Fri, August 17, 2018 11:00 pm, Mike Banon wrote:
>
>> A
Hi Nekoboi, could you please attach some logs to your next message,
when a Radeon card is inserted to your system?
1) lspci -vv
2) "dmesg" kernel log
3) maybe some other logs that you think will help us to help you better
Best regards,
Mike Banon
On Mon, Aug 20, 2018 at 12:42 AM, kin
Sorry but T450S is not supported by coreboot.
Here is a list of laptops that ARE supported:
https://www.coreboot.org/Supported_Motherboards/old
On Mon, Aug 27, 2018 at 4:23 AM Brian Herman
wrote:
>
> I am in contact with a person with the means to reprogram a T450S.
> https://www.allservice.ro/for
boot/comments/98zez2/what_can_the_me_do_when_neutered/e4oln0x/
Best regards,
Mike Banon
On Tue, Aug 28, 2018 at 2:07 AM Th3Fanbus . wrote:
>
> Hello Brian,
>
> As far as I am concerned, Haswell or newer ThinkPads ship with Intel Boot
> Guard enabled in Verified Mode. This prevents
locate a BIOS ROM
amdgpu :04:00.0: Fatal error during GPU init
( https://bugs.freedesktop.org/show_bug.cgi?id=101473 )
More system info like lspci -v and lspci -tv could be also helpful to
resolve a problem.
Please try to provide as much helpful logs as possible
Best regards,
Mike Banon
On Tue
doubtedly,
Intel ME is a backdoor, e.g. because it contains some antitheft
features which could be used to control your computer remotely: shut
it down, wipe or retrieve data from it, etc
Mike
On Tue, Aug 28, 2018 at 11:20 AM Nico Huber wrote:
>
> Hi Mike,
>
> please don't spread FUD on
on a another
> testing board i will test this to.
>
> as i remembered as i logged in via ssh on the testrun with no graphics
> output .. the HD7850 was listed in lspci
>
>
> i will update you with more informations when i am able to.
>
>
> Am 28.08.2018 um 16:11 s
Hi Nico,
You are right, my choice of words has been far from ideal. I apologize
for that. However, to be confident that Intel ME is a backdoor
(personal opinion) - one does not have to be its' creator. I think
there are enough documents describing its' functionality and enough
evidence gathered by
generally accepted
> definition.
Before receiving your message I knew only one definition of a
"frontdoor" computing term which I described in my previous message.
Although I don't know which definition is more popular, sorry for
misunderstanding you.
Mike
On Wed, Aug 29, 2018 at
regarding the ME to a minimum".
>
> We're about to get full control back of the ME. I've been working for
> the past few weeks on reproducing the PTResearch buffer overflow
> exploit on the ME, and yesterday they released a PoC for Apollolake
> (in case you missed it :
Taiidan, thank you very much for your valuable feedback! When I've
been thinking of getting KGPE-D16 my main concern was that some high
end GPUs wouldn't work for some reason and it was difficult to find
any info... Luckily your RX580 doesn't have a Security Processor
inside it ! Did you know AMD s
Regarding a NOTE from your last message:
> For microcode embedding in coreboot to work you must check
> both the "generate microcode update from tree" option and the
> "use non-free blob repo" option -
> doing the first but not the second will result in a silent fail.
It works for KGPE-D16 but does
s workstation. Are there any special
> Coreboot options for Qubes OS that one should be aware of?
Before building your freshly cloned coreboot you need to upgrade the
AMD microcode to its' latest version (this update couldn't be merged
to coreboot until the AMD releases it &quo
awokd, Thank you very much for being the fastest G505S helper ;-)
> Not sure what step #2 is for there. I'd make a backup image
> of the existing flash, then write the new one.
That was just a list of things a person could do, not a sequence...
Also, why that "backup image" would be ever needed i
Problem here is that the latest AMD microcodes officially released by
AMD at linux-firmware.git are far from being the latest... AMD's f15h
recent May 2018 commit contains a version 0x6001119 [2012-07-13]
microcode for TN (CPU ID 0x610F01). Although thats slightly more
recent than what coreboot has
> I'm looking at chronicling my experience on an ifixit article as I go
Hi Matt,
Please also consider expanding that G505S hacking article at
dangerousprototypes wiki (
http://dangerousprototypes.com/docs/Lenovo_G505S_hacking ) , need to
register at dangerousprototypes forums to get a wiki account
splitting the development costs
between us the G505S owners...
Best regards,
Mike Banon
--
coreboot mailing list: coreboot@coreboot.org
https://mail.coreboot.org/mailman/listinfo/coreboot
ether with the cheapest SOIC8 test
clips as soldered to them) - and 20cm aluminium is like 30cm copper in
terms of electrical resistance
On Tue, Sep 25, 2018 at 3:36 PM Anac wrote:
>
>
>
> On 09/24/2018 12:37 AM, Mike Banon wrote:
> > Hello Anac! I am "mikeb" , wrote th
> So this board may support Intel's strict security features like BootGuard and
> Intel ME. These security features are so strong [???] that even the top
> hackers in the open source community haven't fully cracked [???]
Are you sure about that? Lots of vulnerabilities have been discovered
at the
Hi there friend,
For 1), did you plug a BIOS chip into a CH341A directly? Or using a
DIP-8 test clip? + would be nice if you have more than one CH341A and
could try with both of them to exclude a programmer's fault (one of my
ch341a had a missing capacitor and another had a badly soldered chip
leg
se seabios to boot with USB storage.
>
> Thanks,
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
://live.evenea.com/3mdeb-vbeer at 18th Feb 3PM GMT to have some
fun with us.
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le
t;
> Andrew
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
https://review.coreboot.org/c/coreboot/+/48616 - without this tiny URL
fix, building a secondary tint payload results in an error (since the
old archive became unavailable). Would be nice if you can review this
patch to bring back a wonderful tint game
--
Best regards, Mike Banon
Open Source
rking IOMMU on this laptop?
> Thanks,
> Lud
>
>
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
_
ing 4.13 on
> a T410 with success?
>
> Cheers, Daniel
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.co
form has Intel BayTrail SoC, ValleyView chipset and VBIOS. The
> bios do not use GOP driver which replaces VBIOS
>
> Thanks
> Rao
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreb
x27;t been modified in
> any way, thank you.
>
>
> Kindest regards,
>
> Louis
>
>
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best re
;
> Att,
>
> Edvaldo Silva
> edvaldo@zohomail.com
> +55 12 9 8209 6114
>
>
>
>
> Ativado Ter, 02 mar 2021 13:24:31 -0300 Mike Banon
> escreveu
>
> Well, it looks like your flashing has failed. Why? Maybe your flashing
> setup wasn't r
2a6d836d7e1ac8d55
./coreflop.tar.gz
dec8577a76bf190c72f69a4b7fe4f8ef53d53af19ac6890485311da7dd6eb2d5 ./coreflop.rom
coreboot revision - b77cf2299c516a7f5a9a4eccad2b21157278a283
You may also play with the other floppies inside if you'd like - it's fun!
--
Best regards, Mike Banon
Open Source C
s of today.
[1]
https://mail.coreboot.org/hyperkitty/list/seab...@seabios.org/thread/VQHRAEFYDRFFMAN5JEG4BUH666KJEZGS/
[2] https://review.coreboot.org/c/coreboot/+/51393
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
cbfstool_get.sh
Description: a
e
> Telefon 03421 7732269
> Mobil 0160 91012179
>
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
__
future, so that I can
> try again later?
> Best regards and thank you
> Gottfried
>
> --
> *
> Gottfried Kunze
> Telefon 03421 7732269
> Mobil 0160 91012179
>
> ___
> coreboot mailing list -- coreboot@core
march_what/
[2] https://blog.3mdeb.com/tags/trenchboot/
[3] https://osfw.slack.com/
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to c
;
> Giammarco Nalin
>
> Handy: +4915252667614
> Adresse: Hausener Weg 96, 60489, Frankfurt am Main
>
>
>
> From: Mike Banon
> Sent: 24 March 2021 13:40
> To: G. Nalin
> Cc: flash...@flashrom.org
> Subject: Re: [flashrom] Fail flashing
>
> Could you
Hi there Elyes,
Your "getpir" idea really helped me to implement a set of CB:48427
"AMD good IRQ" patches.
Thank you so much for your kind help! Wanted to thank you earlier but
it got lost in drafts ;-)
___
coreboot mailing list -- coreboot@coreboot.org
ly accessible through the GPU.
>
>
> Finally, if the software approach fails, another method may be to look
> for the flash chip on the mainboard and read it out with hardware means.
>
>
> Kind regards
>
> //Peter
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
not ideal for a coreboot training
(because too expensive/rare/advanced/unique if compared to some other
variants)
On Sun, May 2, 2021 at 2:45 PM Nico Huber wrote:
>
> On 29.04.21 11:11, Mike Banon wrote:
> > Dear Friends, please share your thoughts to help us at 3mdeb to
> > ad
p://vpub.3mdeb.com/may7th , 7th May at 3PM UTC
[1] https://blog.3mdeb.com/2021/2021-02-23-osf_vpub_01/
[2] https://osfpga.org/osfpga-foundation-launched/
[3] https://beagleboard.org/beaglev
[4] https://corequest.limesurvey.net/274886?lang=en
--
Best regards, Mike Banon
Open Sou
reboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
ts' beta version -
https://newsletter.3mdeb.com/subscription/23ERA9Fb0
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
ski:
https://blog.3mdeb.com/2021/2021-06-01-optiplex_part2/
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
configuration myself (from
> https://review.coreboot.org/plugins/gitiles/board-status/) and place it
> in the directory?
>
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreb
On Fri, Aug 20, 2021 at 10:07 AM Keith Emery
wrote:
> Guy's if the WiKi is unmaintained can we just get rid of it. Google loves
> directing people to it, and it's incredibly confusing / misleading.
Before getting rid of the old Wiki, the community should look through it
page-by-page and move a
revious record of 50 attendees
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
A87XM-A is also supported?
>
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb -
Dear friends, our vPub v3 event starts in 15 minutes! :D Join us at
https://vpub.dasharo.com/
On Fri, Nov 12, 2021 at 1:25 PM Mike Banon wrote:
>
> Dear friends,
>
> Thank you for a wonderful time with us on our past v1 and v2 online
> parties! :D Now we at 3mdeb are organiz
s, then deprecate
>> after 4.18 (8.5 months from now). At that point, we'd create a branch and
>> set up a verification builder so that any deprecated platforms could be
>> continued in the 4.18 branch.
>>
>> Would this schedule
hat active
> development ends, as no one is working to keep them up to date.
>
> Would it be ok with you to drop the board, and bring it back when it
> is working again?
>
> There is a cost to keeping boards too long when there is no one
> maintaining them. They may still b
the possible
topics
[1] https://lists.fosdem.org/pipermail/fosdem/2021q4/003320.html
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an
ow up and
> when installing Arch also always come errors can you help me please?
>
> Best Regards
>
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
--
Best regards, Mi
ket.coreboot.org/issues/184
>
> Is there anyone working on it.
> Any inputs/hints would be appreciated.
>
> --sameer.
> ___
> coreboot mailing list -- coreboot@coreboot.org
> To unsubscribe send an email to coreboot-le...@coreboot.org
-- Forwarded message -
From: Patrick Bratu
Date: Thu, Feb 10, 2022 at 1:56 PM
Subject: Re: [coreboot] T440P
To: Mike Banon
Hello Mr. Banon
here is my config
thankyou very much
Best regards
Am 29.01.22 um 16:09 schrieb Mike Banon:
> Please share your coreboot .con
x room [2] to designate
a special time for you.
In any case, we will be honoured to see you among us for a great time
together ;-)
[1] https://vpub.dasharo.com/
[2] https://matrix.to/#/#dasharo-osf-vpub:matrix.org
--
Best regards, Mike Banon
Open Source Community Manager of
Just a friendly reminder that our vPub event is going on right now ;-)
Join the fun at https://vpub.dasharo.com/
On Sun, Feb 13, 2022 at 11:32 PM Mike Banon wrote:
>
> Dear friends,
>
> on 17 February at 8 PM UTC we are having a Dasharo OSF vPub Winter
> 2022 opensource onli
ew.coreboot.org
(review.coreboot.org)|2a01:4f8:121:1254::2|:443... failed: Network is
unreachable.
WARNING: can't download a ./patch?zip file !
Please check your Internet connection and try again.
press [ENTER] to continue...
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb
hough the board is listed as supported, I can
> find no flashing instructions anywhere.
>
> Does anyone on this mailing list have experience flashing this board? I don't
> need anyone to hold my hand, but I would appreciate knowing what flashing
> method works, at l
f opensource enthusiasts
from all over the world! ;-)
--
Best regards, Mike Banon
Open Source Community Manager of 3mdeb - https://3mdeb.com/
___
coreboot mailing list -- coreboot@coreboot.org
To unsubscribe send an email to coreboot-le...@coreboot.org
1 - 100 of 308 matches
Mail list logo