Hi,
I am developing coreboot (ver 4.17) along with UEFI payload for a custom
board derived from CFL H RVP11 CRB.
I included the CACHE_MRC_SETTINGS to reduce the boot time on subsequent
power on.
But the time was not reducing and on every power on, around 18 seconds are
taking between post code 0
Dear Moorthi,
Welcome to coreboot.
Am 31.07.24 um 07:45 schrieb Moorthi M.s:
I am developing coreboot (ver 4.17) along with UEFI payload for a custom
board derived from CFL H RVP11 CRB.
I included the CACHE_MRC_SETTINGS to reduce the boot time on subsequent
power on.
But the time was not re
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