@@ -0,0 +1,33 @@
+//===-- X86InstrAVX10.td - AVX10 Instruction Set ---*- tablegen
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
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@@ -2022,6 +2022,22 @@ TARGET_BUILTIN(__builtin_ia32_vsm4key4256,
"V8UiV8UiV8Ui", "nV:256:", "sm4")
TARGET_BUILTIN(__builtin_ia32_vsm4rnds4128, "V4UiV4UiV4Ui", "nV:128:", "sm4")
TARGET_BUILTIN(__builtin_ia32_vsm4rnds4256, "V8UiV8UiV8Ui", "nV:256:", "sm4")
+// AVX10-MINMAX
---
@@ -0,0 +1,219 @@
+/*===--- avx10_2_512minmaxintrin.h - AVX10_2_512MINMAX intrinsics
+ *-===
FreddyLeaf wrote:
[adfe6cd](https://github.com/llvm/llvm-project/pull/101598/commits/adfe6cd518f7f75e8dbbdfcdc6ddadae1a27fc4a)
https://github
@@ -0,0 +1,219 @@
+/*===--- avx10_2_512minmaxintrin.h - AVX10_2_512MINMAX intrinsics
+ *-===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-Li
@@ -2022,6 +2022,22 @@ TARGET_BUILTIN(__builtin_ia32_vsm4key4256,
"V8UiV8UiV8Ui", "nV:256:", "sm4")
TARGET_BUILTIN(__builtin_ia32_vsm4rnds4128, "V4UiV4UiV4Ui", "nV:128:", "sm4")
TARGET_BUILTIN(__builtin_ia32_vsm4rnds4256, "V8UiV8UiV8Ui", "nV:256:", "sm4")
+// AVX10-MINMAX
+TA
@@ -0,0 +1,219 @@
+/*===--- avx10_2_512minmaxintrin.h - AVX10_2_512MINMAX intrinsics
+ *-===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-Li
@@ -0,0 +1,210 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding
-triple=x86_64 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -o - -Wno-invalid-feature-combination -Wall -Werror |
FileCheck %s
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffrees
@@ -0,0 +1,244 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding
-triple=x86_64 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -o - -Wno-invalid-feature-combination -Wall -Werror |
FileCheck %s
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffrees
@@ -0,0 +1,648 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-unknown-unknown
--show-mc-encoding -mattr=+avx10.2-512 | FileCheck %s --check-prefixes=X64
+; RUN: llc < %s -verify-machineinstr
@@ -0,0 +1,188 @@
+/*===--- avx10_2minmaxintrin.h - AVX10_2MINMAX intrinsics
+ *-===
FreddyLeaf wrote:
[adfe6cd](https://github.com/llvm/llvm-project/pull/101598/commits/adfe6cd518f7f75e8dbbdfcdc6ddadae1a27fc4a)
https://github.com/llv
@@ -0,0 +1,188 @@
+/*===--- avx10_2minmaxintrin.h - AVX10_2MINMAX intrinsics
+ *-===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-License-Id
@@ -388,12 +388,27 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx_vpermilvar_ps, INTR_TYPE_2OP, X86ISD::VPERMILPV, 0),
X86_INTRINSIC_DATA(avx_vpermilvar_ps_256, INTR_TYPE_2OP, X86ISD::VPERMILPV,
0),
+X86_INTR
@@ -0,0 +1,219 @@
+/*===--- avx10_2_512minmaxintrin.h - AVX10_2_512MINMAX intrinsics
+ *-===
+ *
+ * Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+ * See https://llvm.org/LICENSE.txt for license information.
+ * SPDX-Li
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@@ -417,3 +417,173 @@ defm VMINMAXSH : avx10_minmax_scalar<"vminmaxsh",
v8f16x_info, X86vminmaxs, X86v
AVX512PSIi8Base, VEX_LIG, EVEX, , EVEX_CD8<16, CD8VT1>,
TA;
defm VMINMAXSS : avx10_minmax_scalar<"vminmaxss", v4f32x_info, X86vminmaxs,
X86vminmaxsSae>,
@@ -821,6 +821,88 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
+def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
+]>;
+
+def SDTAVX10SATCVT_PH2I : SDT
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@@ -821,6 +821,88 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
+def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
+]>;
+
+def SDTAVX10SATCVT_PH2I : SDT
@@ -313,7 +313,7 @@ def v32i16_info : X86VectorVTInfo<32, i16, VR512, "w">;
def v16i32_info : X86VectorVTInfo<16, i32, VR512, "d">;
def v8i64_info : X86VectorVTInfo<8, i64, VR512, "q">;
def v32f16_info : X86VectorVTInfo<32, f16, VR512, "ph">;
-def v32bf16_info: X86VectorVTInf
@@ -821,6 +821,88 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
+def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
+]>;
+
+def SDTAVX10SATCVT_PH2I : SDT
@@ -821,6 +821,88 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
+def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
+]>;
+
+def SDTAVX10SATCVT_PH2I : SDT
@@ -821,6 +821,88 @@ def X86vpdpbuuds : SDNode<"X86ISD::VPDPBUUDS", SDTVnni>;
def X86Vmpsadbw : SDNode<"X86ISD::MPSADBW", SDTX86PSADBW>;
+def SDTAVX10SATCVT_BF162I : SDTypeProfile<1, 1, [
+ SDTCVecEltisVT<0, i16>, SDTCVecEltisVT<1, bf16>
+]>;
+
+def SDTAVX10SATCVT_PH2I : SDT
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@@ -0,0 +1,198 @@
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding
-triple=x86_64 -target-feature +avx10.2-512 \
+// RUN: -emit-llvm -Wall -Werror -verify
+// RUN: %clang_cc1 %s -flax-vector-conversions=none -ffreestanding
-triple=i386 -target-feature +avx10.2
@@ -417,3 +417,168 @@ defm VMINMAXSH : avx10_minmax_scalar<"vminmaxsh",
v8f16x_info, X86vminmaxs, X86v
AVX512PSIi8Base, VEX_LIG, EVEX, , EVEX_CD8<16, CD8VT1>,
TA;
defm VMINMAXSS : avx10_minmax_scalar<"vminmaxss", v4f32x_info, X86vminmaxs,
X86vminmaxsSae>,
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Author: Freddy Ye
Date: 2022-01-04T11:40:40+08:00
New Revision: 0bab7428057048d94774a91c329ae902fcffc170
URL:
https://github.com/llvm/llvm-project/commit/0bab7428057048d94774a91c329ae902fcffc170
DIFF:
https://github.com/llvm/llvm-project/commit/0bab7428057048d94774a91c329ae902fcffc170.diff
LOG
Author: Freddy Ye
Date: 2021-04-12T12:08:59+08:00
New Revision: 5cb47be4104558b2a69dc3df667dbe046bdcce6d
URL:
https://github.com/llvm/llvm-project/commit/5cb47be4104558b2a69dc3df667dbe046bdcce6d
DIFF:
https://github.com/llvm/llvm-project/commit/5cb47be4104558b2a69dc3df667dbe046bdcce6d.diff
LOG
Author: Freddy Ye
Date: 2021-10-08T22:07:40+08:00
New Revision: 6d276595d1ce734a2269f6d3828dc457d7da99c4
URL:
https://github.com/llvm/llvm-project/commit/6d276595d1ce734a2269f6d3828dc457d7da99c4
DIFF:
https://github.com/llvm/llvm-project/commit/6d276595d1ce734a2269f6d3828dc457d7da99c4.diff
LOG
@@ -7089,3 +7089,133 @@ def int_x86_avx10_mask_vcvttps2iubs512 :
ClangBuiltin<"__builtin_ia32_vcvttps2iu
DefaultAttrsIntrinsic<[llvm_v16i32_ty], [llvm_v16f32_ty,
llvm_v16i32_ty, llvm_i16_ty, llvm_i32_ty],
[IntrNoMem, ImmArg>]>;
}
+
+//===
@@ -847,6 +847,91 @@ def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS",
SDTFloatToInt>;
def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;
def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;
+def SDTAVX10CONVERT_I82F16 : SDTypeProfile<
@@ -624,3 +624,328 @@ defm VCVTTPS2IUBS : avx10_sat_cvt_base<0x6a,
"vcvttps2iubs", SchedWriteVecIMul,
avx512vl_i32_info, avx512vl_f32_info,
X86vcvttp2iubsSAE>,
AVX512PDIi8Base, T_MA
@@ -847,6 +847,91 @@ def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS",
SDTFloatToInt>;
def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;
def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;
+def SDTAVX10CONVERT_I82F16 : SDTypeProfile<
@@ -847,6 +847,91 @@ def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS",
SDTFloatToInt>;
def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;
def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;
+def SDTAVX10CONVERT_I82F16 : SDTypeProfile<
@@ -847,6 +847,91 @@ def X86vcvttp2iubs : SDNode<"X86ISD::CVTTP2IUBS",
SDTFloatToInt>;
def X86vcvttp2ibsSAE : SDNode<"X86ISD::CVTTP2IBS_SAE", SDTFloatToInt>;
def X86vcvttp2iubsSAE : SDNode<"X86ISD::CVTTP2IUBS_SAE", SDTFloatToInt>;
+def SDTAVX10CONVERT_I82F16 : SDTypeProfile<
@@ -617,7 +617,7 @@ constexpr FeatureBitset ImpliedFeaturesAVX10_1 =
FeatureAVX512CD | FeatureAVX512VBMI | FeatureAVX512IFMA |
FeatureAVX512VNNI | FeatureAVX512BF16 | FeatureAVX512VPOPCNTDQ |
FeatureAVX512VBMI2 | FeatureAVX512BITALG | FeatureVAES | FeatureVPCLMULQDQ
https://github.com/FreddyLeaf approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/104781
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@@ -44,7 +44,7 @@ unsigned char _InterlockedCompareExchange128_rel(__int64
volatile *_Destination,
__int64 *_ComparandResult);
#endif
-#ifdef __x86_64__
+#ifdef __x86_64__ && !defined(__arm64ec__)
FreddyLeaf wr
https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/113274
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
>From 19c6400ac7127860ac1712941acbd1585614d17d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 10:24:14 +0800
Subject: [PATCH] [X86] Su
https://github.com/FreddyLeaf ready_for_review
https://github.com/llvm/llvm-project/pull/113274
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>From 19c6400ac7127860ac1712941acbd1585614d17d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 10:24:14 +0800
Subject: [PATCH 1/3] [X86] Support MOVRS and AVX10.2 instructions.
Ref.: https://
https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/113402
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
>From 83a2ef421831dec1790c3c6adf3141ed1ac9a0d5 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 09:30:26 +0800
Subject: [PATCH] [X86] Su
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/113274
>From 19c6400ac7127860ac1712941acbd1585614d17d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 10:24:14 +0800
Subject: [PATCH 1/2] [X86] Support MOVRS and AVX10.2 instructions.
Ref.: https://
@@ -44,7 +44,7 @@ unsigned char _InterlockedCompareExchange128_rel(__int64
volatile *_Destination,
__int64 *_ComparandResult);
#endif
-#ifdef __x86_64__
+#ifdef __x86_64__ && !defined(__arm64ec__)
FreddyLeaf wr
@@ -665,6 +665,9 @@ _storebe_i64(void * __P, long long __D) {
#include
#include
#include
+#if (defined(__SM4__))
FreddyLeaf wrote:
[c0a33ab](https://github.com/llvm/llvm-project/pull/113402/commits/c0a33abe804bafe11e9dcecb092b924bcd08cdb7)
https://github.c
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/113881
>From 4a7f17f29a007ce7af0893670a362f738b0d8d6e Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 15:27:24 +0800
Subject: [PATCH 1/3] [X86] Support -march=diamondrapids
Ref.: https://cdrdv2.inte
https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/113881
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
>From 4a7f17f29a007ce7af0893670a362f738b0d8d6e Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 15:27:24 +0800
Subject: [PATCH] [X86] Su
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/113881
>From 4a7f17f29a007ce7af0893670a362f738b0d8d6e Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 15:27:24 +0800
Subject: [PATCH 1/2] [X86] Support -march=diamondrapids
Ref.: https://cdrdv2.inte
https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/113402
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>From 19c6400ac7127860ac1712941acbd1585614d17d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 10:24:14 +0800
Subject: [PATCH 1/4] [X86] Support MOVRS and AVX10.2 instructions.
Ref.: https://
@@ -7572,3 +7572,42 @@ def int_x86_avx10_vfnmsub231nepbf16128 :
ClangBuiltin<"__builtin_ia32_vfnmsub231
DefaultAttrsIntrinsic<[llvm_v8bf16_ty], [llvm_v8bf16_ty,
llvm_v8bf16_ty, llvm_v8bf16_ty ],
[IntrNoMem]>;
}
+
+let TargetPrefix = "x86"
@@ -0,0 +1,98 @@
+/*=== movrs_avx10_2_512intrin.h - AVX512MOVRS intrinsics ---===
FreddyLeaf wrote:
[567131c](https://github.com/llvm/llvm-project/pull/113274/commits/567131c8c265bd29dede1ad76dd1c52a4077b270)
https://github.com/llvm/llvm-project/
@@ -6109,6 +6109,12 @@ let TargetPrefix = "x86" in {
DefaultAttrsIntrinsic<[llvm_v8i32_ty],
[llvm_v8i32_ty, llvm_v8i32_ty],
[IntrNoMem]>;
+def int_x86_vsm4key4512 : ClangBuiltin<"__builtin_ia32_vsm4key4512">,
+Intrinsic<[llvm_v16i32_ty], [llvm_v1
@@ -6109,6 +6109,12 @@ let TargetPrefix = "x86" in {
DefaultAttrsIntrinsic<[llvm_v8i32_ty],
[llvm_v8i32_ty, llvm_v8i32_ty],
[IntrNoMem]>;
+def int_x86_vsm4key4512 : ClangBuiltin<"__builtin_ia32_vsm4key4512">,
+Intrinsic<[llvm_v16i32_ty], [llvm_v1
@@ -0,0 +1,224 @@
+// RUN: llvm-mc -triple x86_64-unknown-unknown --show-encoding %s | FileCheck
%s
FreddyLeaf wrote:
[23d4bfc](https://github.com/llvm/llvm-project/pull/113402/commits/23d4bfcabdca8968cba600e2fc0b440121990ef5)
https://github.com/llvm/llvm-proje
@@ -1647,3 +1647,23 @@ let isCodeGenOnly = 1, ForceDisassemble = 1,
hasSideEffects = 0 in
def : InstAlias<"vmovw.s\t{$src, $dst|$dst, $src}",
(VMOVZPWILo2PWIZrr2 VR128X:$dst, VR128X:$src), 0>;
}
+
+// SM4(EVEX)
+multiclass avx10_sm4_base {
+ // SM4_Base is
@@ -0,0 +1,64 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-- --show-mc-encoding
-mattr=+sm4,+avx10.2-512 | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-- --show-mc-enc
@@ -196,6 +196,8 @@ Changes to the X86 Backend
* Support ISA of `AVX10.2-256` and `AVX10.2-512`.
+* Support ISA of `SM4(EVEX)`.
FreddyLeaf wrote:
[23d4bfc](https://github.com/llvm/llvm-project/pull/113402/commits/23d4bfcabdca8968cba600e2fc0b440121990ef5)
ht
https://github.com/FreddyLeaf closed
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>From 4c0a5729c8da644cfc01ad25820386f0cc289316 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Fri, 25 Oct 2024 10:00:16 +0800
Subject: [PATCH 1/2] [X86][CFE] Correct parameter type of _cmpccxadd_epi64
---
c
@@ -10,3 +10,7 @@ int test_cmpccxadd32(void *__A, int __B, int __C) {
long long test_cmpccxadd64(void *__A, long long __B, long long __C) {
return _cmpccxadd_epi64(__A, __B, __C, 16); // expected-error {{argument
value 16 is outside the valid range [0, 15]}}
}
+
+long long t
https://github.com/FreddyLeaf approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/109598
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https://github.com/llvm/llvm-project/pull/113274
>From 19c6400ac7127860ac1712941acbd1585614d17d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 10:24:14 +0800
Subject: [PATCH 1/5] [X86] Support MOVRS and AVX10.2 instructions.
Ref.: https://
@@ -0,0 +1,170 @@
+# RUN: llvm-mc --disassemble %s -triple=x86_64 | FileCheck %s
--check-prefixes=ATT
FreddyLeaf wrote:
[23d4bfc](https://github.com/llvm/llvm-project/pull/113402/commits/23d4bfcabdca8968cba600e2fc0b440121990ef5)
https://github.com/llvm/llvm-pro
@@ -1647,3 +1647,23 @@ let isCodeGenOnly = 1, ForceDisassemble = 1,
hasSideEffects = 0 in
def : InstAlias<"vmovw.s\t{$src, $dst|$dst, $src}",
(VMOVZPWILo2PWIZrr2 VR128X:$dst, VR128X:$src), 0>;
}
+
+// SM4(EVEX)
+multiclass avx10_sm4_base {
+ // SM4_Base is
@@ -0,0 +1,170 @@
+# RUN: llvm-mc --disassemble %s -triple=i386-unknown-unknown | FileCheck %s
--check-prefixes=ATT
FreddyLeaf wrote:
[23d4bfc](https://github.com/llvm/llvm-project/pull/113402/commits/23d4bfcabdca8968cba600e2fc0b440121990ef5)
https://github.com
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/113274
>From 19c6400ac7127860ac1712941acbd1585614d17d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 10:24:14 +0800
Subject: [PATCH 1/6] [X86] Support MOVRS and AVX10.2 instructions.
Ref.: https://
@@ -2339,6 +2339,19 @@ TARGET_BUILTIN(__builtin_ia32_vfmaddnepbh512,
"V32yV32yV32yV32y", "ncV:512:", "a
TARGET_BUILTIN(__builtin_ia32_vfmaddnepbh256, "V16yV16yV16yV16y", "ncV:256:",
"avx10.2-256")
TARGET_BUILTIN(__builtin_ia32_vfmaddnepbh128, "V8yV8yV8yV8y", "ncV:128:",
"avx1
@@ -261,6 +261,7 @@ X86_FEATURE_COMPAT(AVX10_1, "avx10.1-256",
36)
X86_FEATURE_COMPAT(AVX10_1_512, "avx10.1-512", 37)
X86_FEATURE_COMPAT(AVX10_2, "avx10.2-256",0)
X86_FEATURE_COMPAT(AVX10_2_512, "avx10.2-512",
@@ -0,0 +1,174 @@
+/*===-- movrs_avx10_2intrin.h - AVX512MOVRS intrinsics -===
FreddyLeaf wrote:
[567131c](https://github.com/llvm/llvm-project/pull/113274/commits/567131c8c265bd29dede1ad76dd1c52a4077b270)
https://github.com/llvm/llvm-project
@@ -261,6 +261,7 @@ X86_FEATURE_COMPAT(AVX10_1, "avx10.1-256",
36)
X86_FEATURE_COMPAT(AVX10_1_512, "avx10.1-512", 37)
X86_FEATURE_COMPAT(AVX10_2, "avx10.2-256",0)
X86_FEATURE_COMPAT(AVX10_2_512, "avx10.2-512",
@@ -0,0 +1,64 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -verify-machineinstrs -mtriple=x86_64-- --show-mc-encoding
-mattr=+sm4,+avx10.2-512 | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mtriple=i686-- --show-mc-enc
https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/113402
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https://github.com/FreddyLeaf edited
https://github.com/llvm/llvm-project/pull/113402
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@@ -1155,6 +1155,34 @@ def ProcessorFeatures {
list GNRDFeatures =
!listconcat(GNRFeatures, GNRDAdditionalFeatures);
+ // Diamond Rapids
+ list DMRAdditionalFeatures = [FeatureAVX10_2_512,
+ FeatureAMXCOMPLEX,
--
@@ -381,6 +389,8 @@ constexpr ProcInfo Processors[] = {
{ {"emeraldrapids"}, CK_Emeraldrapids, FEATURE_AVX512FP16,
FeaturesSapphireRapids, 'n', false },
// Clearwaterforest microarchitecture based processors.
{ {"clearwaterforest"}, CK_Lunarlake, FEATURE_AVX2,
FeaturesC
@@ -1139,6 +1139,28 @@ def ProcessorFeatures {
list GNRDFeatures =
!listconcat(GNRFeatures, GNRDAdditionalFeatures);
+ // Diamondrapids
FreddyLeaf wrote:
[52e63a0](https://github.com/llvm/llvm-project/pull/113881/commits/52e63a0f4b48ad106471343f2f48976
@@ -600,6 +601,19 @@ static const char
*getIntelProcessorTypeAndSubtype(unsigned Family,
break;
}
break;
+ case 19:
+switch (Model) {
+// Diamondrapids:
+case 0x01:
+ CPU = "diamondrapids";
+ *Type = INTEL_COREI7;
+ *Subtype = INTEL_CO
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/113881
>From 4a7f17f29a007ce7af0893670a362f738b0d8d6e Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 15:27:24 +0800
Subject: [PATCH 1/5] [X86] Support -march=diamondrapids
Ref.: https://cdrdv2.inte
@@ -121,6 +121,7 @@ enum CPUKind {
CK_GraniterapidsD,
CK_Emeraldrapids,
CK_Clearwaterforest,
+ CK_DiamondRapids,
FreddyLeaf wrote:
I prefer your style, too. Let's refine CK_SapphireRapids as well in the future
https://github.com/llvm/llvm-project/pull/
https://github.com/FreddyLeaf updated
https://github.com/llvm/llvm-project/pull/113881
>From 4a7f17f29a007ce7af0893670a362f738b0d8d6e Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 21 Oct 2024 15:27:24 +0800
Subject: [PATCH 1/6] [X86] Support -march=diamondrapids
Ref.: https://cdrdv2.inte
@@ -121,6 +121,7 @@ enum CPUKind {
CK_GraniterapidsD,
CK_Emeraldrapids,
CK_Clearwaterforest,
+ CK_DiamondRapids,
FreddyLeaf wrote:
ab477fb
https://github.com/llvm/llvm-project/pull/113881
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FreddyLeaf wrote:
> Looks like this breaks tests: http://45.33.8.238/linux/153081/step_6.txt
>
> Please take a look and revert for now if it takes a while to fix.
Thanks reminding. Revert first.
https://github.com/llvm/llvm-project/pull/113881
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https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/116564
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https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/116563
This reverts commit 826b845c9e97448395431be3e4e5da585bd98c5e.
>From e349e24b3e10a44414593252d117bf2936b4bc91 Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 18 Nov 2024 08:43:26 +0800
Subject: [PATCH] R
https://github.com/FreddyLeaf created
https://github.com/llvm/llvm-project/pull/116564
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
>From 043c82617a6b1aec08915f294b8ede449705b09d Mon Sep 17 00:00:00 2001
From: Freddy Ye
Date: Mon, 18 Nov 2024 08:47:24 +0800
Subject: [PATCH] Reland "
https://github.com/FreddyLeaf closed
https://github.com/llvm/llvm-project/pull/116563
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https://github.com/FreddyLeaf closed
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