[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov created this revision. apivovarov added reviewers: evandro, kito-cheng, khchen. Herald added subscribers: vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, niosHD,

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 369369. apivovarov added a comment. fix typo in MCPU-ABI-SIFIVE-S51 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 Files: clang/test/Driver/riscv-cpus.c llvm/

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 369635. apivovarov added a comment. update the patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 Files: clang/test/Driver/riscv-cpus.c llvm/include/llvm/Su

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 369745. apivovarov added a comment. Add `sifive-s51` to test `target-invalid-cpu-note.c` error messages match string Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a subscriber: kito.cheng. apivovarov added a comment. @evandro @kito-cheng @kito.cheng @khchen @MaskRay Could you review this patch? Thank you Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a comment. In D108886#2977733 , @jrtc27 wrote: > You don't need to tag people as well as adding them as reviewers, it's just > annoying. Also, it's only been four days; the developer policy is that for > non-urgent patches you shouldn't

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov updated this revision to Diff 370072. apivovarov added a comment. Added a note to Release Notes Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D108886 Files: clang/docs/ReleaseNotes.rst clang/test

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a comment. Evandro, similar notes have been made in the past for Release Notes 12.x and 11.x for Arm and RISC-V processors: https://github.com/llvm/llvm-project/blob/release/12.x/clang/docs/ReleaseNotes.rst#modified-compiler-flags https://github.com/llvm/llvm-project/blob/release

[PATCH] D108886: Add RISC-V sifive-s51 cpu

apivovarov added a comment. Add Cortex-A78C Support for Clang and LLVM is similar to this patch. As we can see `cortex-a78c` support was included to the ReleaseNotes 12.x

[PATCH] D108886: Add RISC-V sifive-s51 cpu

This revision was automatically updated to reflect the committed changes. Closed by commit rG6cd4b508a8a5: [RISCV] Add SiFive core S51 (authored by apivovarov). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D108886/new/ https://reviews.llvm.org/D1088

[PATCH] D109260: [RISCV] Add SiFive core E20

apivovarov created this revision. apivovarov added reviewers: MaskRay, evandro. Herald added subscribers: vkmr, frasercrmck, luismarques, apazos, sameer.abuasal, s.egerton, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, shiva0217, kit

[PATCH] D109260: [RISCV] Add SiFive core E20

apivovarov added a comment. Another missing combination is: - e24 and e34 (rocket, rv32imafc) I can also add several cores which are similar to existing cores: - e21 (same as existing e31 - rocket, rv32imac) - s21 (same as existing s51 - rocket, rv64imac) - s54 (same as existing u54 - rocket, r

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

apivovarov updated this revision to Diff 370683. apivovarov retitled this revision from "[RISCV] Add SiFive core E20" to "[RISCV] Add SiFive cores E and S series". apivovarov edited the summary of this revision. apivovarov added a comment. Added SiFive cores E20, E21, E24, E34, S21, S54 and S76

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

apivovarov updated this revision to Diff 370687. apivovarov added a comment. fix typos Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109260/new/ https://reviews.llvm.org/D109260 Files: clang/docs/ReleaseNotes.rst clang/test/Driver/riscv-cpus.c

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

apivovarov marked 4 inline comments as done. apivovarov added inline comments. Comment at: llvm/lib/Target/RISCV/RISCV.td:279 + +def : ProcessorModel<"sifive-s21", RocketModel, [Feature64Bit, + FeatureStdExtM, craig

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

apivovarov updated this revision to Diff 370691. apivovarov marked an inline comment as done. apivovarov added a comment. main branch is unstable. pulling the hot fixes again CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109260/new/ https://reviews.llvm.org/D109260 Files: clang/d

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

apivovarov updated this revision to Diff 370692. apivovarov added a comment. fix double space issue. Fri... Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109260/new/ https://reviews.llvm.org/D109260 Files: clang/docs/ReleaseNotes.rst clang/tes

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

apivovarov added a comment. Craig, I fixed all of the issue on Fri. Could you look at the patch again? Thank you Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109260/new/ https://reviews.llvm.org/D109260 __

[PATCH] D109260: [RISCV] Add SiFive cores E and S series

This revision was automatically updated to reflect the committed changes. Closed by commit rG4bc8dbe0cae3: [RISCV] Add SiFive cores E and S series (authored by apivovarov). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D109260/new/ https://reviews.ll