This revision was automatically updated to reflect the committed changes.
Closed by commit rL246228: [X86] Use AVX features instead of ABI to init.
SimdDefaultAlign. (authored by ab).
Changed prior to commit:
http://reviews.llvm.org/D12390?vs=33280&id=33363#toc
Repository:
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http://re
Author: ab
Date: Thu Aug 27 17:30:38 2015
New Revision: 246229
URL: http://llvm.org/viewvc/llvm-project?rev=246229&view=rev
Log:
[X86] Conditionalize Darwin MaxVectorAlign on the presence of AVX.
There's no point in using a larger alignment if we have no instructions
that would benefit from it.
This revision was automatically updated to reflect the committed changes.
Closed by commit rL246229: [X86] Conditionalize Darwin MaxVectorAlign on the
presence of AVX. (authored by ab).
Changed prior to commit:
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ab added a comment.
r246228 using the features
Thanks for the reviews!
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This revision was automatically updated to reflect the committed changes.
Closed by commit rL246230: [X86] Bump Darwin MaxVectorAlign to 64 when AVX512
is enabled. (authored by ab).
Changed prior to commit:
http://reviews.llvm.org/D10724?vs=28433&id=33367#toc
Repository:
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http://revi
Author: ab
Date: Thu Aug 27 17:42:12 2015
New Revision: 246230
URL: http://llvm.org/viewvc/llvm-project?rev=246230&view=rev
Log:
[X86] Bump Darwin MaxVectorAlign to 64 when AVX512 is enabled.
Without this, 64-byte vector types (__m512), specified to be 64-byte
aligned in the AVX512 draft SysV ABI
ab created this revision.
ab added reviewers: echristo, rnk.
ab added subscribers: alexr, dim, dschuff, tberghammer, cfe-commits.
Follow-up to r246229: this isn't Darwin-specific, so let's enable it for all
X86 targets.
Quoting r160209, which introduced it:
```
Currently, if no aligned attribut
nment?
> Also, should we do this for all of the x86 OSes?
>
I'm not sure: MaxVectorAlign was only set for the Darwin targets, but I
think it would make sense everywhere.
Let's see what people say: http://reviews.llvm.org/D12505
Thanks for the comments!
-Ahmed
> -eric
&
ab created this revision.
ab added reviewers: rjmccall, uweigand, t.p.northover.
ab added a subscriber: cfe-commits.
Herald added a subscriber: aemerson.
Currently, for the ppc64--gnu and aarch64 ABIs, we recognize:
```
typedef __attribute__((__ext_vector_type__(3))) float v3f32;
typedef __attri
ab added a comment.
Thanks Ulrich. Tim?
http://reviews.llvm.org/D18998
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Author: ab
Date: Tue Apr 19 12:54:24 2016
New Revision: 266783
URL: http://llvm.org/viewvc/llvm-project?rev=266783&view=rev
Log:
[CodeGen] Fix whitespace. NFC.
Modified:
cfe/trunk/lib/CodeGen/TargetInfo.cpp
Modified: cfe/trunk/lib/CodeGen/TargetInfo.cpp
URL:
http://llvm.org/viewvc/llvm-proj
Author: ab
Date: Tue Apr 19 12:54:29 2016
New Revision: 266784
URL: http://llvm.org/viewvc/llvm-project?rev=266784&view=rev
Log:
[CodeGen] Widen non-power-of-2 vector HFA base types.
Currently, for the ppc64--gnu and aarch64 ABIs, we recognize:
typedef __attribute__((__ext_vector_type__(3))) fl
This revision was automatically updated to reflect the committed changes.
Closed by commit rL266784: [CodeGen] Widen non-power-of-2 vector HFA base
types. (authored by ab).
Changed prior to commit:
http://reviews.llvm.org/D18998?vs=53336&id=54224#toc
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Author: ab
Date: Tue Apr 19 14:44:45 2016
New Revision: 266807
URL: http://llvm.org/viewvc/llvm-project?rev=266807&view=rev
Log:
[ARM NEON] Define vfms_f32 on ARM, and all vfms using vfma.
r259537 added vfma/vfms to armv7, but the builtin was only lowered
on the AArch64 side. Instead of supportin
Author: ab
Date: Fri May 27 12:57:23 2016
New Revision: 271022
URL: http://llvm.org/viewvc/llvm-project?rev=271022&view=rev
Log:
[Headers] Remove redundant typedef. NFC.
Modified:
cfe/trunk/lib/Headers/smmintrin.h
Modified: cfe/trunk/lib/Headers/smmintrin.h
URL:
http://llvm.org/viewvc/llvm-
ab added a subscriber: ab.
ab accepted this revision.
ab added a reviewer: ab.
ab added a comment.
This revision is now accepted and ready to land.
I'd add the unsigned typedefs with their signed counterparts; no reason not to.
With that, LGTM.
Repository:
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ab accepted this revision.
ab added a comment.
This revision is now accepted and ready to land.
LGTM
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ab added a subscriber: ab.
ab added a comment.
In http://reviews.llvm.org/D20358#446210, @RKSimon wrote:
> Is there any reason why we can't just get rid of all the SSE movnt builtins
> and use __builtin_nontemporal_store instead (http://reviews.llvm.org/D12313)?
I wanted to suggest that too, b
ab added a comment.
In http://reviews.llvm.org/D20358#446218, @ab wrote:
> In http://reviews.llvm.org/D20358#446210, @RKSimon wrote:
>
> > Is there any reason why we can't just get rid of all the SSE movnt builtins
> > and use __builtin_nontemporal_store instead
> > (http://reviews.llvm.org/D12
Author: ab
Date: Mon Jan 4 13:35:40 2016
New Revision: 256772
URL: http://llvm.org/viewvc/llvm-project?rev=256772&view=rev
Log:
[libcxx] Fix typo in darwin target_info.py introduced by r256621.
Modified:
libcxx/trunk/test/libcxx/test/target_info.py
Modified: libcxx/trunk/test/libcxx/test/ta
Author: ab
Date: Wed Jan 6 12:43:14 2016
New Revision: 256956
URL: http://llvm.org/viewvc/llvm-project?rev=256956&view=rev
Log:
Bump DiagnosticDriverKinds count; we're close to hitting it.
$ grep '= DIAG_START_DRIVER' include/clang/Basic/DiagnosticIDs.h
DIAG_START_FRONTEND = DIAG_ST
Author: ab
Date: Wed Jan 6 20:36:09 2016
New Revision: 257018
URL: http://llvm.org/viewvc/llvm-project?rev=257018&view=rev
Log:
[libcxx] Set LC_ALL rather than LC_COLLATE to override collation.
r251131 replaced LANG with LC_COLLATE. But LC_ALL has precedence
over both, so the test still fails wh
https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/97647
Enabled in clang using:
-fptrauth-indirect-gotos
and at the IR level using function attribute:
"ptrauth-indirect-gotos"
Signing uses IA and a per-function integer discriminator. The discriminator
https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/97647
>From 519570896c82887a5dd878fcc16f884857d4fce3 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Tue, 12 Mar 2024 14:40:17 -0700
Subject: [PATCH] [AArch64][PAC] Sign block addresses used in indirectbr.
E
ahmedbougacha wrote:
> Please make sure you have a testcase for computing the difference between two
> blockaddresses (void g(int*); int f() { static int x = &&A-&&B;
> A:g(&x);B:return x; }). Not sure how you should handle that case.
Oh yeah, we can't handle that at all, I don't think! The b
https://github.com/ahmedbougacha ready_for_review
https://github.com/llvm/llvm-project/pull/97647
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/102416
>From 41061b347b7d0fa862f65896d4fc155cb0b791ba Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Fri, 24 May 2024 20:24:26 -0700
Subject: [PATCH 1/2] [clang] Wire -fptrauth-returns to "ptrauth-returns" f
https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/102416
>From 41061b347b7d0fa862f65896d4fc155cb0b791ba Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Fri, 24 May 2024 20:24:26 -0700
Subject: [PATCH 1/3] [clang] Wire -fptrauth-returns to "ptrauth-returns" f
ahmedbougacha wrote:
> @ahmedbougacha Non-blocking nit: you might want to add a test in
> clang/test/CodeGen/ptrauth-function-attributes.c (like you have for auth
> traps in https://github.com/llvm/llvm-project/pull/102417)
Oh yeah that's certainly required; I think I dropped it accidentally
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https://github.com/llvm/llvm-project/pull/102417
>From 241ecf478c0cc0e929ffef3532cc2cb625781a71 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Fri, 9 Aug 2024 12:26:20 -0700
Subject: [PATCH] [clang] Enable pointer authentication auth-failure traps.
https://github.com/ahmedbougacha closed
https://github.com/llvm/llvm-project/pull/102417
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https://github.com/ahmedbougacha approved this pull request.
https://github.com/llvm/llvm-project/pull/95579
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@@ -983,50 +1007,58 @@ def : ProcessorModel<"thunderx3t110", ThunderX3T110Model,
def : ProcessorModel<"tsv110", TSV110Model, ProcessorFeatures.TSV110,
[TuneTSV110]>;
+// iPhone, iPad, Mac and Watch CPUs
ahmedbougacha wrote:
Certainly mino
https://github.com/ahmedbougacha approved this pull request.
https://github.com/llvm/llvm-project/pull/95478
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https://github.com/ahmedbougacha edited
https://github.com/llvm/llvm-project/pull/93903
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/93903
>From 607592e7071a604fc63252cb3686545ed1f1b0b8 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Thu, 30 May 2024 17:22:29 -0700
Subject: [PATCH 1/6] [clang] Define ptrauth_string_discriminator builtin.
@@ -328,6 +328,21 @@ be done in a single instruction with an immediate integer.
``pointer`` must have pointer type, and ``integer`` must have integer type. The
result has type ``ptrauth_extra_data_t``.
+``ptrauth_string_discriminator``
+
+
+.. c
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https://github.com/llvm/llvm-project/pull/93903
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https://github.com/llvm/llvm-project/pull/93904
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/93904
>From 2767407e2970d6fb8b0e651d80162d9481129258 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Thu, 30 May 2024 17:33:04 -0700
Subject: [PATCH 1/6] [clang] Define ptrauth_sign_constant builtin.
This is
https://github.com/ahmedbougacha closed
https://github.com/llvm/llvm-project/pull/93904
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/93906
>From 016baec5833f0fba4280e67ba24caed48e8a1017 Mon Sep 17 00:00:00 2001
From: Akira Hatanaka
Date: Fri, 24 May 2024 20:23:36 -0700
Subject: [PATCH 1/6] [clang] Implement function pointer signing.
Co-Author
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https://github.com/llvm/llvm-project/pull/94056
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https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/93901
These are currently gated by __APPLE__; we can figure out a way to define these
on ELF targets as well, and maybe have them be defined by clang itself,
depending on ABI modes.
>From fc8f76b404b25951dc10ec
https://github.com/ahmedbougacha edited
https://github.com/llvm/llvm-project/pull/93901
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/93901
>From fc8f76b404b25951dc10ecaaa760b4b4c3d4f858 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Thu, 30 May 2024 17:07:04 -0700
Subject: [PATCH 1/2] [clang] Add arm64e ABI-defined key assignments to
ptr
@@ -15,6 +15,29 @@ typedef enum {
ptrauth_key_asib = 1,
ptrauth_key_asda = 2,
ptrauth_key_asdb = 3,
+
+#ifdef __APPLE__
ahmedbougacha wrote:
Great, let's do that; I also removed the comments that talk about enablement
policy, that seems like a separate
https://github.com/ahmedbougacha closed
https://github.com/llvm/llvm-project/pull/93901
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/93902
>From fc8f76b404b25951dc10ecaaa760b4b4c3d4f858 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Thu, 30 May 2024 17:07:04 -0700
Subject: [PATCH 1/2] [clang] Add arm64e ABI-defined key assignments to
ptr
@@ -718,12 +718,16 @@ def ProcessorFeatures {
list AppleA13 = [HasV8_4aOps, FeatureCrypto,
FeatureFPARMv8,
FeatureNEON, FeaturePerfMon,
FeatureFullFP16,
FeatureFP16FML, FeatureSHA3];
+ // Apple A14 a
ahmedbougacha wrote:
> > Correct, apple-m1 does not have BTI, but BTI is required for v8.5. My
> > mistake.
>
> Not sure if you are involved in writing the optimization guide itself at
> Apple, but the way the chip is described as having 8.5 minus BTI is a bit
> confusing since that would tec
ahmedbougacha wrote:
> The overall idea is that system registers ought be available everywhere
> without the need to explicitly enable them with a command line option.
Interesting, that's kind of what I'm getting at: longer term, are you saying
you folks are considering removing the feature pr
@@ -718,12 +718,16 @@ def ProcessorFeatures {
list AppleA13 = [HasV8_4aOps, FeatureCrypto,
FeatureFPARMv8,
FeatureNEON, FeaturePerfMon,
FeatureFullFP16,
FeatureFP16FML, FeatureSHA3];
+ // Apple A14 a
https://github.com/ahmedbougacha closed
https://github.com/llvm/llvm-project/pull/97647
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ahmedbougacha wrote:
> The difference should be not be signed IMO as stated above.
We discussed this in the sync-up, but for the record I don't think we can get
away with not signing and nothing else. It defeats the purpose of signing
these in the first place: an arbitrary write becomes a br
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https://github.com/llvm/llvm-project/pull/98276
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https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/99726
We want to be able to support full type and address discrimination of type_info
on targets that don't have existing ABI compatibility constraints.
This patch does not enable such behavior on any platform,
https://github.com/ahmedbougacha edited
https://github.com/llvm/llvm-project/pull/99726
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https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/97647
>From 519570896c82887a5dd878fcc16f884857d4fce3 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Tue, 12 Mar 2024 14:40:17 -0700
Subject: [PATCH 1/3] [AArch64][PAC] Sign block addresses used in indirectbr
@@ -0,0 +1,106 @@
+; RUN: llc -mtriple arm64e-apple-darwin \
ahmedbougacha wrote:
It's not too bad; switched
https://github.com/llvm/llvm-project/pull/97647
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https
@@ -10685,6 +10689,26 @@ SDValue AArch64TargetLowering::LowerBR_JT(SDValue Op,
return DAG.getNode(ISD::BRIND, DL, MVT::Other, JTInfo, SDValue(Dest, 0));
}
+SDValue AArch64TargetLowering::LowerBRIND(SDValue Op, SelectionDAG &DAG) const
{
+ MachineFunction &MF = DAG.getMachi
@@ -412,6 +412,15 @@ class AArch64Subtarget final : public
AArch64GenSubtargetInfo {
/// Choose a method of checking LR before performing a tail call.
AArch64PAuth::AuthCheckMethod getAuthenticatedLRCheckMethod() const;
+ /// Compute the integer discriminator for a given
@@ -1789,6 +1789,9 @@ void Clang::AddAArch64TargetArgs(const ArgList &Args,
options::OPT_fno_ptrauth_vtable_pointer_type_discrimination);
Args.addOptInFlag(CmdArgs, options::OPT_fptrauth_init_fini,
options::OPT_fno_ptrauth_init_fini);
+
-
https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/97647
>From 519570896c82887a5dd878fcc16f884857d4fce3 Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Tue, 12 Mar 2024 14:40:17 -0700
Subject: [PATCH 1/5] [AArch64][PAC] Sign block addresses used in indirectbr
https://github.com/ahmedbougacha updated
https://github.com/llvm/llvm-project/pull/99726
>From f46421f8e0349f65f07ab3bd822e179bf983439f Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Wed, 17 Jul 2024 16:18:41 -0700
Subject: [PATCH 1/2] [clang] Implement type/address discrimination of
type
https://github.com/ahmedbougacha ready_for_review
https://github.com/llvm/llvm-project/pull/99726
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https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/106304
In the tablegen definitions, we have now split the lists of extensions enabled
by default for an arch version from the features that are required.
However, the frontend (in `AArch64TargetInfo::setFeatureE
https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/106312
This is a partial revert of c66e1d6f3429. Even though that
allowed us to declare v9.2-a support without picking up SVE2
in both the backend and the driver, the frontend itself still
enabled SVE via the arc
https://github.com/ahmedbougacha milestoned
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ahmedbougacha wrote:
In the meantime, let's do #106312
https://github.com/llvm/llvm-project/pull/106304
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https://github.com/llvm/llvm-project/pull/106312
>From c9b283760399f46cc4cb4a728069fb8c33e00e5f Mon Sep 17 00:00:00 2001
From: Ahmed Bougacha
Date: Tue, 27 Aug 2024 16:48:35 -0700
Subject: [PATCH 1/2] [AArch64] Add incorrect target(cpu=apple-m4) fn attr
https://github.com/ahmedbougacha closed
https://github.com/llvm/llvm-project/pull/106312
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ahmedbougacha wrote:
/cherry-pick e5e38ddf1b8043324175868831da21e941c00aff
https://github.com/llvm/llvm-project/pull/106312
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ahmedbougacha wrote:
#106599 release/19.x: [AArch64] Make apple-m4 armv8.7-a again (from armv9.2-a).
https://github.com/llvm/llvm-project/pull/106312
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@@ -718,12 +718,16 @@ def ProcessorFeatures {
list AppleA13 = [HasV8_4aOps, FeatureCrypto,
FeatureFPARMv8,
FeatureNEON, FeaturePerfMon,
FeatureFullFP16,
FeatureFP16FML, FeatureSHA3];
+ // Apple A14 a
ahmedbougacha wrote:
> This patch removes FEAT_FPMR from list of available of architecture features,
> instead enabling FMPR register by default.
Can you expand a little bit on the reasoning? It doesn't seem all that
problematic but is still eyebrow-raising.
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https://github.com/llvm/llvm-project/pull/102072
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@@ -1056,12 +1056,18 @@ class ConstantPtrAuth final : public Constant {
return !getAddrDiscriminator()->isNullValue();
}
- /// A constant value for the address discriminator which has special
- /// significance to ctors/dtors lowering. Regular address discrimination
c
https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/102416
We already ended up with -fptrauth-returns, the feature macro, the lang opt,
and the actual backend lowering.
The only part left is threading it all through PointerAuthOptions, to drive the
addition of t
https://github.com/ahmedbougacha created
https://github.com/llvm/llvm-project/pull/102417
This provides -fptrauth-auth-traps, which at the frontend level only controls
the addition of the "ptrauth-auth-traps" function attribute. The attribute in
turn controls various aspects of backend codege
https://github.com/ahmedbougacha ready_for_review
https://github.com/llvm/llvm-project/pull/102416
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https://github.com/ahmedbougacha ready_for_review
https://github.com/llvm/llvm-project/pull/102417
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Author: Ahmed Bougacha
Date: 2022-01-26T20:52:54-08:00
New Revision: ecb502342cf2b3b4b6dfcd8fe881c596880d1a4a
URL:
https://github.com/llvm/llvm-project/commit/ecb502342cf2b3b4b6dfcd8fe881c596880d1a4a
DIFF:
https://github.com/llvm/llvm-project/commit/ecb502342cf2b3b4b6dfcd8fe881c596880d1a4a.diff
Author: Ahmed Bougacha
Date: 2021-04-20T08:41:04-07:00
New Revision: a8a3a43792472c9775c60fa79b9357033d47ce40
URL:
https://github.com/llvm/llvm-project/commit/a8a3a43792472c9775c60fa79b9357033d47ce40
DIFF:
https://github.com/llvm/llvm-project/commit/a8a3a43792472c9775c60fa79b9357033d47ce40.diff
Author: Ahmed Bougacha
Date: 2021-04-20T08:41:04-07:00
New Revision: cedb5b06df1bab31e0484df31a40585ac7e7af19
URL:
https://github.com/llvm/llvm-project/commit/cedb5b06df1bab31e0484df31a40585ac7e7af19
DIFF:
https://github.com/llvm/llvm-project/commit/cedb5b06df1bab31e0484df31a40585ac7e7af19.diff
Author: Ahmed Bougacha
Date: 2021-10-11T18:46:26-07:00
New Revision: c30a52852ba5e85bdd3b1b70b4add7335fabca9a
URL:
https://github.com/llvm/llvm-project/commit/c30a52852ba5e85bdd3b1b70b4add7335fabca9a
DIFF:
https://github.com/llvm/llvm-project/commit/c30a52852ba5e85bdd3b1b70b4add7335fabca9a.diff
https://github.com/ahmedbougacha edited
https://github.com/llvm/llvm-project/pull/104435
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https://github.com/ahmedbougacha commented:
A couple small issues inline, LGTM otherwise, thanks!
>> FEAT_SSBS is not mandatory for any architecture.
>
> https://reviews.llvm.org/D54629 says it is mandatory for 8.5-a but I can't
> see that in the Arm ARM.
It was indeed originally mandatory (se
@@ -845,7 +857,8 @@ def ProcessorFeatures {
list AppleA12 = [HasV8_3aOps, FeatureSHA2, FeatureAES,
FeatureFPARMv8,
FeatureNEON, FeaturePerfMon,
FeatureFullFP16,
FeatureComplxNum, FeatureCRC, FeatureJS
@@ -892,7 +905,7 @@ def ProcessorFeatures {
FeatureComplxNum, FeatureCRC, FeatureJS,
FeatureLSE, FeaturePAuth, FeatureFPAC,
FeatureRAS, FeatureRCPC, FeatureRDM,
-
https://github.com/ahmedbougacha edited
https://github.com/llvm/llvm-project/pull/104435
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ahmedbougacha wrote:
> > * Calling a function marked interrupt from a function marked interrupt is
> > still UB isn't it? Should there be another warning to cover that scenario
> > as well?
>
> Correct. I can create a separate issue to describe such a warning. Calling an
> interrupt handler f
https://github.com/ahmedbougacha edited
https://github.com/llvm/llvm-project/pull/94056
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