@@ -2460,63 +2528,108 @@ void SampleProfileMatcher::runOnFunction(const
Function &F) {
!ProbeManager->profileIsValid(F, *FSFlattened)) {
// The matching result will be saved to IRToProfileLocationMap, create a
new
// map for each function.
+auto &IRToProfile
https://github.com/alexey-bataev updated
https://github.com/llvm/llvm-project/pull/78976
>From 391145a2d04873ef84c4f1083fe9b9fcdbb3b940 Mon Sep 17 00:00:00 2001
From: Alexey Bataev
Date: Mon, 22 Jan 2024 14:13:51 +
Subject: [PATCH] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20initia?=
epilk wrote:
@tstellar there was some uncertainty about whether to leave the spelling as-is
since mesa used to following HSA code object versions (but doesn't anymore).
Would you have any objections to this change?
https://github.com/llvm/llvm-project/pull/79905
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@llvm/pr-subscribers-clang-codegen
@llvm/pr-subscribers-lld
@llvm/pr-subscribers-clang
Author: Emma Pilkington (epilk)
Changes
The previous name 'amdgpu_code_object_version', was misleading since this is
really a property of the HSA OS. The new spelling also matches the asm
AaronBallman wrote:
> I don't think we need a Release note for it since this was a faulty behavior
> to start with. It's not related to any of the options.
Ah, good to know, thanks!
> Would be nice to cherry-pick. Not sure how to do that though.
https://llvm.org/docs/GitHub.html#backporting-f
jwanggit86 wrote:
@krzysz00 Let me make sure I understand the requirements correctly. Based on my
understanding, the following are the requirements. Pls let me know if there are
any mistakes.
1. Create a new function attribute for the number of workgroups (maybe 2
attributes, one for max, and
torshepherd wrote:
Also, I noticed that the conversion function `toCodeAction(const Fix& F, ...)`
specifically hardcodes all Fix objects to `QUICKFIX_KIND`. When we do
https://github.com/clangd/clangd/issues/1446, it would be good to add a string
for `SOURCE_FIX_ALL_KIND` and set these fix-all
llvm-beanz wrote:
@rjmccall, ping
https://github.com/llvm/llvm-project/pull/71098
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https://github.com/PiotrZSL updated
https://github.com/llvm/llvm-project/pull/71701
>From 050d53bdbc01be93a15f6851faddc24e520f0472 Mon Sep 17 00:00:00 2001
From: Piotr Zegar
Date: Wed, 8 Nov 2023 16:52:06 +
Subject: [PATCH 1/2] [clang-tidy] Add AllowStringArrays option to
modernize-avoid-c
PiotrZSL wrote:
> I may not work for
>
> ```c++
> void f(const char name[]);
>
> f("111");
> ```
It should not work, as this is not array, but pointer. If you do `sizeof(name)`
you get size of pointer, instead of number of elements in array.
https://github.com/llvm/llvm-project/pull/71701
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Author: yronglin
Date: 2024-01-30T06:48:14+08:00
New Revision: 0aff71c17831c4f3c7147e792b5761107c011dd5
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MaskRay wrote:
> Fix erroneous warning.
I'd suggest a more descriptive title, e.g. `[Driver] Fix erroneous warning for
-fcx-limited-range and -fcx-fortran-rules`
Please also mention #70244 in the description. I am not familiar with the two
options, I'll trust your judgement as the author of #
https://github.com/MaskRay requested changes to this pull request.
.
https://github.com/llvm/llvm-project/pull/79821
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@@ -44,3 +47,4 @@
// CHECK-NOT: -complex-range=fortran
// WARN1: warning: overriding '-fcx-limited-range' option with
'-fcx-fortran-rules' [-Woverriding-option]
// WARN2: warning: overriding '-fcx-fortran-rules' option with
'-fcx-limited-range' [-Woverriding-option]
+// range
https://github.com/MaskRay edited
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jhuber6 wrote:
I've actually encountered some really strange behavior when trying to update
`libc` to use the new intrinsic. The following returns a common 64-bit value to
be compatible with AMDGPU's 64 lane wide mode. When I run this against the test
suite, it fails on tests that specifically
https://github.com/mehnadnerd created
https://github.com/llvm/llvm-project/pull/79911
This PR implements the RISC-V Atomic Load-Acquire and Store-Release Extension
(Zalasr).
See also https://github.com/mehnadnerd/riscv-zalasr.
This PR replaces https://github.com/llvm/llvm-project/pull/69685 be
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mehnadnerd wrote:
Closing because superseded by https://github.com/llvm/llvm-project/pull/79911.
https://github.com/llvm/llvm-project/pull/69685
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llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Brendan Sweeney (mehnadnerd)
Changes
This PR implements the RISC-V Atomic Load-Acquire and Store-Release Extension
(Zalasr).
See also https://github.com/mehnadnerd/riscv-zalasr.
This PR replaces https://github.com/llvm/llvm-project/pull/6
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Ident
https://github.com/topperc closed
https://github.com/llvm/llvm-project/pull/77089
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dwblaikie wrote:
Could you show the stack (omitting/annotating the repeated part) that leads to
failure? and/or the AST shape that leads to failure?
https://github.com/llvm/llvm-project/pull/79875
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@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Ident
jhuber6 wrote:
Scratch that, I missed `Ui` in the builtin definition. I'll do a quick fix.
https://github.com/llvm/llvm-project/pull/79892
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@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Ident
Author: Joseph Huber
Date: 2024-01-29T17:33:38-06:00
New Revision: 0a2b5b03c4084ac1fefd0e62db2ba49f5ac24ab9
URL:
https://github.com/llvm/llvm-project/commit/0a2b5b03c4084ac1fefd0e62db2ba49f5ac24ab9
DIFF:
https://github.com/llvm/llvm-project/commit/0a2b5b03c4084ac1fefd0e62db2ba49f5ac24ab9.diff
Author: Joseph Huber
Date: 2024-01-29T17:34:45-06:00
New Revision: 51379a982efc64eb319ba6f4c1af4dce31af499a
URL:
https://github.com/llvm/llvm-project/commit/51379a982efc64eb319ba6f4c1af4dce31af499a
DIFF:
https://github.com/llvm/llvm-project/commit/51379a982efc64eb319ba6f4c1af4dce31af499a.diff
https://github.com/jhuber6 closed
https://github.com/llvm/llvm-project/pull/79892
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https://github.com/fpasserby updated
https://github.com/llvm/llvm-project/pull/79712
>From 7f767bcc0fe44b3d4960e4a47aab4cc857471f00 Mon Sep 17 00:00:00 2001
From: fpasserby <125797601+fpasse...@users.noreply.github.com>
Date: Sun, 28 Jan 2024 00:02:15 +0100
Subject: [PATCH 1/4] Implement llvm.co
fpasserby wrote:
Thank you for replying so quickly.
Your suggestion about `IsSuspendNoThrow` makes sense, it's totally possible to
perform the check during codegen.
About `helperFunction` - this is how I understood the comment in
`SemaCoroutine.cpp` near the place where `std::coroutine_handle
https://github.com/nmustakin updated
https://github.com/llvm/llvm-project/pull/70667
>From 153c6d812939cd23bb71e53c71378117ed5b23c7 Mon Sep 17 00:00:00 2001
From: Nafis Mustakin
Date: Mon, 30 Oct 2023 07:50:59 -0700
Subject: [PATCH 1/6] Add memory diff dump for kernel record-replay
---
.../Pl
https://github.com/topperc approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/79618
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@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Ident
https://github.com/bc-lee closed https://github.com/llvm/llvm-project/pull/68525
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@@ -1730,12 +1730,26 @@ let ManualCodegen = [{
defm vfwnmacc : RVVFloatingWidenTerBuiltinSetRoundingMode;
defm vfwmsac : RVVFloatingWidenTerBuiltinSetRoundingMode;
defm vfwnmsac : RVVFloatingWidenTerBuiltinSetRoundingMode;
+
+// Vector BF16 widening multiply-ac
@@ -0,0 +1,66 @@
+//===-- RISCVInstrInfoZalasr.td - RISC-V 'Zalasr' instructions ---*-
tablegen -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Ident
https://github.com/Bigcheese updated
https://github.com/llvm/llvm-project/pull/73734
>From 0559ec44d2d3c39292bae6d6431dde9626ac755e Mon Sep 17 00:00:00 2001
From: Michael Spencer
Date: Fri, 24 Feb 2023 17:18:51 -0800
Subject: [PATCH 1/2] [clang][DepScan] Remove unused -ivfsoverlay files
`-ivfs
https://github.com/BeMg updated https://github.com/llvm/llvm-project/pull/78120
>From f3444e9f434a5084b16ad25981428549c5b2e151 Mon Sep 17 00:00:00 2001
From: Piyou Chen
Date: Sun, 14 Jan 2024 19:41:59 -0800
Subject: [PATCH 1/9] [RISCV] Relax march string order constraint
---
clang/test/Driver/
https://github.com/bogner updated
https://github.com/llvm/llvm-project/pull/78221
>From 8903229f71503c1c4291254c355b1692d9d908a3 Mon Sep 17 00:00:00 2001
From: Justin Bogner
Date: Mon, 15 Jan 2024 18:14:07 -0800
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20in?=
=?UTF
@@ -0,0 +1,102 @@
+===
+Architecture and Design of DXIL Support in LLVM
+===
+
+.. contents::
+ :local:
+
+.. toctree::
+ :hidden:
+
+Introduction
+
+
+LLVM supports reading and
@@ -0,0 +1,102 @@
+===
+Architecture and Design of DXIL Support in LLVM
+===
+
+.. contents::
+ :local:
+
+.. toctree::
+ :hidden:
+
+Introduction
+
+
+LLVM supports reading and
@@ -0,0 +1,102 @@
+===
+Architecture and Design of DXIL Support in LLVM
+===
+
+.. contents::
+ :local:
+
+.. toctree::
+ :hidden:
+
+Introduction
+
+
+LLVM supports reading and
@@ -0,0 +1,102 @@
+===
+Architecture and Design of DXIL Support in LLVM
+===
+
+.. contents::
+ :local:
+
+.. toctree::
+ :hidden:
+
+Introduction
+
+
+LLVM supports reading and
@@ -0,0 +1,479 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN: -target-feature +zvfh -target-feat
MaskRay wrote:
> OpenBSD also has a local patch for linking with the old BFD linker on mips64
> and sparc64.
What's the issue? GNU ld has had -Bsymbolic-functions since 2007 and for quite
a few releases LLVM has been using `-Bsymbolic-functions`.
https://github.com/llvm/llvm-project/pull/7953
https://github.com/ahatanak updated
https://github.com/llvm/llvm-project/pull/79230
>From 678cd8ea37f1d02c70fd09b7107542c8301c3bd2 Mon Sep 17 00:00:00 2001
From: Akira Hatanaka
Date: Tue, 16 Jan 2024 13:18:09 -0800
Subject: [PATCH 1/6] Add support for builtin_verbose_trap
The builtin causes th
https://github.com/kusmour updated
https://github.com/llvm/llvm-project/pull/79926
>From 9536c3990f83400d6ce1a8208ccd669dc38f4ebf Mon Sep 17 00:00:00 2001
From: Wanyi Ye
Date: Mon, 29 Jan 2024 16:01:33 -0800
Subject: [PATCH] [llvm-gsymutil] Fix assert failure on FileEntry.Dir empty
Summary:
Fi
https://github.com/kusmour closed
https://github.com/llvm/llvm-project/pull/79926
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https://github.com/michaelmaitland created
https://github.com/llvm/llvm-project/pull/79929
This patch implements the v0.8.1 specification. This patch reports version 0.8
in llvm since `RISCVISAInfo::ExtensionVersion` only has a `Major` and `Minor`
version number. This patch includes includes s
llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: Michael Maitland (michaelmaitland)
Changes
This patch implements the v0.8.1 specification. This patch reports version 0.8
in llvm since `RISCVISAInfo::ExtensionVersion` only has a `Major` and `Minor`
version number. This patch in
https://github.com/michaelmaitland updated
https://github.com/llvm/llvm-project/pull/79929
>From 0d1c71afab487cc1028fcfc678c111205140ac21 Mon Sep 17 00:00:00 2001
From: Michael Maitland
Date: Mon, 29 Jan 2024 12:33:59 -0800
Subject: [PATCH 1/2] [RISCV] Add support for RISC-V Pointer Masking
Th
HerrCai0907 wrote:
> It should not work, as this is not array, but pointer
Agree. But it fulfills the description of this opinion, since it looks like to
construct a array from string literals.
It would be better to explain it in document.
> incomplete array types constructed from string liter
@@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
+
+// Zvfbfmin - Vector convert BF16 to FP32
+let Log2LMUL = [-
@@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
+
+// Zvfbfmin - Vector convert BF16 to FP32
+let Log2LMUL = [-
@@ -0,0 +1,218 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN: -target-feature +zvfh -target-feat
https://github.com/ChuanqiXu9 edited
https://github.com/llvm/llvm-project/pull/79875
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@@ -4099,7 +4099,9 @@ Decl *ASTReader::ReadDeclRecord(DeclID ID) {
// calls to Decl::getASTContext() by Decl's methods will find the
// TranslationUnitDecl without crashing.
D->setDeclContext(Context.getTranslationUnitDecl());
- Reader.Visit(D);
+
+ // Reading some decl
https://github.com/ChuanqiXu9 commented:
To make this testable, maybe we can refactor
`clang::runWithSufficientStackSpace` a little bit to make `DesiredStackSize`
and `isStackNearlyExhausted::SufficientStack` configurable.
https://github.com/llvm/llvm-project/pull/79875
__
@@ -0,0 +1,43 @@
+// RUN: rm -rf %t
+// RUN: mkdir -p %t
+// RUN: split-file %s %t
+
+// RUN: %clang_cc1 -std=c++20 -emit-module-interface %t/usings.cppm -o
%t/usings.pcm
+// RUN: %clang_cc1 -std=c++20 -fmodule-file=usings=%t/usings.pcm %t/use.cpp
-verify -fsyntax-only -Wno-stac
ChuanqiXu9 wrote:
Another idea is to limit (or check) the threshold for
`ASTReader::NumCurrentElementsDeserializing`. Then we still can print the stack
trace by some utils in LLVM also we can get better performance than this.
https://github.com/llvm/llvm-project/pull/79875
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https://github.com/eddyz87 updated
https://github.com/llvm/llvm-project/pull/79902
>From fdd5a736fb5f2ce046f53f7d059e3d347416b27d Mon Sep 17 00:00:00 2001
From: Eduard Zingerman
Date: Fri, 26 Jan 2024 04:18:32 +0200
Subject: [PATCH 1/2] [BPF] add cast_{user,kern} instructions
This commit aims
https://github.com/clayborg edited
https://github.com/llvm/llvm-project/pull/79926
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https://github.com/clayborg commented:
Just remove the "--num-threads" option from the test yaml file and this is good
to go.
https://github.com/llvm/llvm-project/pull/79926
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@@ -0,0 +1,108 @@
+## Test converting DWARF using relative path
+
+# RUN: yaml2obj %s -o %t
+# RUN: llvm-gsymutil --convert %t -o %t.gsym --segment-size=10
--num-threads=80 --quiet 2>&1 | FileCheck %s --check-prefix=CONVERT
clayborg wrote:
Don't specify the
@@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
+
+// Zvfbfmin - Vector convert BF16 to FP32
+let Log2LMUL = [-
Author: Kazu Hirata
Date: 2024-01-29T18:46:11-08:00
New Revision: a112df28edc449e3e47101ffa7d4b6f0bc040c63
URL:
https://github.com/llvm/llvm-project/commit/a112df28edc449e3e47101ffa7d4b6f0bc040c63
DIFF:
https://github.com/llvm/llvm-project/commit/a112df28edc449e3e47101ffa7d4b6f0bc040c63.diff
L
https://github.com/shamithoke updated
https://github.com/llvm/llvm-project/pull/77107
>From a0ccb2cbe3882a6ea8bb020dd54460f57dd84a90 Mon Sep 17 00:00:00 2001
From: shami
Date: Thu, 28 Dec 2023 21:29:36 +0530
Subject: [PATCH] LLVM_FAULTMAPS section can be put after the DWARF section.
---
llvm/
https://github.com/jameshu15869 created
https://github.com/llvm/llvm-project/pull/79936
This PR adds initial support for out-of-process execution through
llvm-jitlink-executor to clang-repl on ELF. The out-of-process executor can be
invoked with "-oop-executor" or "-oop-executor-connect=" on E
https://github.com/jameshu15869 converted_to_draft
https://github.com/llvm/llvm-project/pull/79936
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llvmbot wrote:
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Author: None (jameshu15869)
Changes
This PR adds initial support for out-of-process execution through
llvm-jitlink-executor to clang-repl on ELF. The out-of-process executor can be
invoked with "-oop-executor" or "-oop-executor-connect=" on
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158cc5ec91bf085ec9914de26a1554606a1e3338 --
https://github.com/yinying-lisa-li updated
https://github.com/llvm/llvm-project/pull/79935
>From fa5210448dea1f88d8e0a242543ad1be655087e0 Mon Sep 17 00:00:00 2001
From: Yinying Li
Date: Tue, 30 Jan 2024 01:01:52 +
Subject: [PATCH 1/3] [mlir][sparse] Expand LevelType to 64 bit and implement
rmarker wrote:
> > > @mydeveloperday @HazardyKnusperkeks @rymiel this patch fixes a very old
> > > bug and will cause behavior changes whether the default is changed to the
> > > new `AllowShortType` or left at `None`. Which way should we go?
> >
> >
> > Now I'm leaning toward keeping the exi
@@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
+
+// Zvfbfmin - Vector convert BF16 to FP32
+let Log2LMUL = [-
@@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
+
+// Zvfbfmin - Vector convert BF16 to FP32
+let Log2LMUL = [-
https://github.com/benshi001 created
https://github.com/llvm/llvm-project/pull/79939
None
>From 5bbac365c3b587bc72f503c4ce146503f0d0095f Mon Sep 17 00:00:00 2001
From: Ben Shi
Date: Tue, 30 Jan 2024 11:45:30 +0800
Subject: [PATCH] [clang][analyzer] Improve modeling of 'realpath' in
StdLibrary
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Ben Shi (benshi001)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/79939.diff
2 Files Affected:
- (modified) clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
(+4-2)
- (modified) clang/test/Analysis/e
llvmbot wrote:
@llvm/pr-subscribers-clang-static-analyzer-1
Author: Ben Shi (benshi001)
Changes
---
Full diff: https://github.com/llvm/llvm-project/pull/79939.diff
2 Files Affected:
- (modified) clang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp
(+4-2)
- (modified) cla
@@ -0,0 +1,479 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +v -target-feature +zfh \
+// RUN: -target-feature +zvfh -target-feat
MaxEW707 wrote:
Ping
https://github.com/llvm/llvm-project/pull/76646
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https://github.com/NxPKG updated https://github.com/llvm/llvm-project/pull/79697
>From f7b4f61db6016a1a02d775efc1e921fac785e823 Mon Sep 17 00:00:00 2001
From: snyk-bot
Date: Fri, 19 Jan 2024 07:12:22 +
Subject: [PATCH 1/6] feat: upgrade vscode-languageclient from 8.0.2-next.5 to
9.0.1
Snyk
@@ -2460,63 +2528,108 @@ void SampleProfileMatcher::runOnFunction(const
Function &F) {
!ProbeManager->profileIsValid(F, *FSFlattened)) {
// The matching result will be saved to IRToProfileLocationMap, create a
new
// map for each function.
+auto &IRToProfile
@@ -1730,12 +1730,26 @@ let ManualCodegen = [{
defm vfwnmacc : RVVFloatingWidenTerBuiltinSetRoundingMode;
defm vfwmsac : RVVFloatingWidenTerBuiltinSetRoundingMode;
defm vfwnmsac : RVVFloatingWidenTerBuiltinSetRoundingMode;
+
+// Vector BF16 widening multiply-ac
https://github.com/aaupov created
https://github.com/llvm/llvm-project/pull/79942
Build on Clang-BOLT infrastructure to collect sample profiles for CSSPGO.
Add clang/cmake/caches/CSSPGO.cmake to automate CSSPGO Clang build.
Differential Revision: https://reviews.llvm.org/D155419
Test Plan:
Add
llvmbot wrote:
@llvm/pr-subscribers-clang
Author: Amir Ayupov (aaupov)
Changes
Build on Clang-BOLT infrastructure to collect sample profiles for CSSPGO.
Add clang/cmake/caches/CSSPGO.cmake to automate CSSPGO Clang build.
Differential Revision: https://reviews.llvm.org/D155419
Test Plan:
https://github.com/4vtomat deleted
https://github.com/llvm/llvm-project/pull/79618
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github-actions[bot] wrote:
:warning: Python code formatter, darker found issues in your code. :warning:
You can test this locally with the following command:
``bash
darker --check --diff -r
c34aa784f8867517315d8ef32a8038ee9dbb7165...90686f2cd5e210f9ca974c10f8c1224a825c1315
clang
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/79795
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https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/79942
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@@ -1883,6 +1883,12 @@ let Log2LMUL = [-3, -2, -1, 0, 1, 2] in {
def vfncvt_rtz_x_f_w : RVVConvToNarrowingSignedBuiltin<"vfncvt_rtz_x">;
def vfncvt_rod_f_f_w : RVVConvBuiltin<"v", "vw", "xf", "vfncvt_rod_f">;
}
+
+// Zvfbfmin - Vector convert BF16 to FP32
+let Log2LMUL = [-
https://github.com/aaupov updated
https://github.com/llvm/llvm-project/pull/79942
>From 90686f2cd5e210f9ca974c10f8c1224a825c1315 Mon Sep 17 00:00:00 2001
From: Amir Ayupov
Date: Wed, 19 Jul 2023 20:30:29 -0700
Subject: [PATCH 1/2] [Clang][CMake] Add CSSPGO support to
LLVM_BUILD_INSTRUMENTED
B
https://github.com/H-G-Hristov updated
https://github.com/llvm/llvm-project/pull/79744
>From 52cdb5a5ae4ad33bb16dfe05738d64ee568a24ce Mon Sep 17 00:00:00 2001
From: Zingam
Date: Sat, 27 Jan 2024 21:12:16 +0200
Subject: [PATCH] [libc++][complex] P2819R2 - Add `tuple` protocol to `complex`
Imple
boomanaiden154 wrote:
Do you have benchmarks on how well this performs relative to standard IRPGO (or
on top of it)?
https://github.com/llvm/llvm-project/pull/79942
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@@ -282,6 +282,9 @@ void RISCVIntrinsicManagerImpl::ConstructRVVIntrinsics(
}
}
+ if (BaseType == BasicType::BFloat16 && !TI.hasFeature("zvfbfmin"))
tclin914 wrote:
bfloat vector is only valid when zvfbfmin is enabled. So it doesn't need to
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