https://github.com/wangpc-pp edited
https://github.com/llvm/llvm-project/pull/111668
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@@ -276,6 +276,14 @@ foreach i = 0...15 in {
foreach i = 0...63 in
def : SysReg<"pmpaddr"#i, !add(0x3B0, i)>;
+//===--===//
+// Machine Non-Maskable Interrupt Handling
+//===-
@@ -66,6 +66,8 @@ def riscv_sret_glue : SDNode<"RISCVISD::SRET_GLUE", SDTNone,
[SDNPHasChain, SDNPOptInGlue]>;
def riscv_mret_glue : SDNode<"RISCVISD::MRET_GLUE", SDTNone,
[SDNPHasChain, SDNPOptInGlue]>;
+def riscv_mnret
asb wrote:
Welcome to the project @dong-miao! I'm not sure why the auto-labeler didn't
kick in to attach the backend:RISC-V label (this is used to help ping the right
people), but I've added that now.
Just two quick comments as it's end of day here so I can't review properly
right now:
* We t
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llvmbot wrote:
@llvm/pr-subscribers-backend-risc-v
Author: None (dong-miao)
Changes
This commit has completed the Extension for Resumable Non Maskable Interrupts,
adding four CRSs and one Trap-Return instruction.
Specification link:["Smrnmi"
Extension](https://github.com/riscv/riscv-isa-
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https://github.com/dong-miao created
https://github.com/llvm/llvm-project/pull/111668
This commit has completed the Extension for Resumable Non Maskable Interrupts,
adding four CRSs and one Trap-Return instruction.
Specification link:["Smrnmi"
Extension](https://github.com/riscv/riscv-isa-manu
