[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2244839 , @leonardchan wrote: >> The IR differences were caused by the new pass manager which is on by >> default for the Fuchsia builder. I've re-landed the patch with a fix for >> `CodeGen/attr-arm-sve-vector-bits-ca

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

leonardchan added a comment. > The IR differences were caused by the new pass manager which is on by default > for the Fuchsia builder. I've re-landed the patch with a fix for > `CodeGen/attr-arm-sve-vector-bits-call.c` to use the legacy pm with > `-fno-experimental-new-pass-manager`. Thanks f

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2243188 , @c-rhodes wrote: > In D85743#2242931 , @leonardchan > wrote: > >> Hi! The `attr-arm-sve-vector-bits-call.c` test seems to be failing on our >> clang builders: >> >> Co

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2242931 , @leonardchan wrote: > Hi! The `attr-arm-sve-vector-bits-call.c` test seems to be failing on our > clang builders: > > Could you take a look? Thanks. > > Builder: > https://luci-milo.appspot.com/p/fuchsia/buil

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

leonardchan added a comment. Hi! The `attr-arm-sve-vector-bits-call.c` test seems to be failing on our clang builders: FAIL: Clang :: CodeGen/attr-arm-sve-vector-bits-call.c (3020 of 25924) TEST 'Clang :: CodeGen/attr-arm-sve-vector-bits-call.c' FAILED *

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes added a comment. In D85743#2219215 , @efriedma wrote: > LGTM > > Like I mentioned on the review for the prototype, I still think we should try > to implement a scheme that makes CK_BItCast between fixed and scalable types > trivial. Doing coerc

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

efriedma accepted this revision. efriedma added a comment. This revision is now accepted and ready to land. LGTM Like I mentioned on the review for the prototype, I still think we should try to implement a scheme that makes CK_BItCast between fixed and scalable types trivial. Doing coercion th

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

david-arm added inline comments. Comment at: clang/lib/CodeGen/CGCall.cpp:1342 + if (SrcSize.getKnownMinSize() <= DstSize.getKnownMinSize() || + (isa(SrcTy) || + isa(DstTy))) { I think if you restructure the code here you could do: if (isa(SrcTy) ||

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

c-rhodes marked 2 inline comments as done. c-rhodes added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3330 +// appendices to the Procedure Call Standard for the Arm Architecture, see: +// https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#app

[PATCH] D85743: [CodeGen][AArch64] Support arm_sve_vector_bits attribute

efriedma added inline comments. Comment at: clang/lib/AST/ItaniumMangle.cpp:3330 +// appendices to the Procedure Call Standard for the Arm Architecture, see: +// https://github.com/ARM-software/abi-aa/blob/master/aapcs64/aapcs64.rst#appendix-c-mangling +void CXXNameMangler::mang