krzysz00 added a comment.
From a quick skim of the backtrace, I think this comes down to the fact that
there isn't a defined way to stick a `p7` into registers (or, equivalently,
there's no `MVT::i160`) and that getting said pointers to that point was
supposed to never happen (in that they were
foad added a comment.
Hi, with the new datalayout we're hitting this crash:
; RUN: opt -passes=indvars -S < %s
target datalayout =
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v51
This revision was not accepted when it landed; it landed in state "Needs
Review".
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf0415f2a456d: Re-land "[AMDGPU] Define data layout
entries for buf
krzysz00 created this revision.
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