uweigand wrote:
> I see a lot of target specific pre-processing in clear_cache.c that either
> disables this to a no-op, or does something target specific. The test itself
> this is disabled for some targets. Seems reasonable to leave this as
> unsupported and disable the test (for now?). Also
uweigand wrote:
The s390x failures are unrelated.
https://github.com/llvm/llvm-project/pull/111918
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand approved this pull request.
LGTM, let's try to merge again.
https://github.com/llvm/llvm-project/pull/119257
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand closed
https://github.com/llvm/llvm-project/pull/119257
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand commented:
Thanks for fixing those issues. Just a couple of further comments inline.
https://github.com/llvm/llvm-project/pull/119257
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/ma
@@ -0,0 +1,51 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; Test longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Backchain Value from Slot 3.
+; Stack Pointer from Slot 4.
+; Lit
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/119257
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -374,10 +374,11 @@ overall functioning of this intrinsic is compatible with
the GCC
to interoperate.
The single parameter is a pointer to a five word buffer in which the calling
-context is saved. The front end places the frame pointer in the first word, and
-the target im
uweigand wrote:
@redstar looks like this disables an optimization on z/OS with mixed pointer
widths. Please have a look whether this is relevant.
https://github.com/llvm/llvm-project/pull/119365
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
uweigand wrote:
The s390x failure is just an unstable test that occasionally fails - that
woudn't be a reason to revert. Cannot say about the arm64-windows failure.
https://github.com/llvm/llvm-project/pull/118734
___
cfe-commits mailing list
cfe-com
Author: Ulrich Weigand
Date: 2024-12-07T00:55:54+01:00
New Revision: 8787bc72a61aa43a6e937647b6797ddb2ff287d2
URL:
https://github.com/llvm/llvm-project/commit/8787bc72a61aa43a6e937647b6797ddb2ff287d2
DIFF:
https://github.com/llvm/llvm-project/commit/8787bc72a61aa43a6e937647b6797ddb2ff287d2.diff
uweigand wrote:
Hi @anoopkg6 , I had to revert this again as it was causing a number of issues:
- An unused variable warning fixed here:
https://github.com/llvm/llvm-project/commit/3c47e63723b1aa9e76f30fc8d1acef9caf4ea783
- The fuchsia build bot failure - I'm not completely sure what causes thi
https://github.com/uweigand closed
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand approved this pull request.
LGTM now. Thanks for your contribution!
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cf
https://github.com/uweigand commented:
One last comment, then it looks good to go for me. Thanks!
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -374,10 +374,11 @@ overall functioning of this intrinsic is compatible with
the GCC
to interoperate.
The single parameter is a pointer to a five word buffer in which the calling
-context is saved. The front end places the frame pointer in the first word, and
-the target im
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand commented:
This now looks good to me (see one inline comment). The only part missing is
the doc change as discussed above - can you add this to the PR here? Then it
should be good to go. Thanks!
https://github.com/llvm/llvm-project/pull/116642
__
@@ -1,4 +1,4 @@
-//===-- SystemZISelLowering.cpp - SystemZ DAG lowering implementation
-===//
+//===-- systemzisellowering.cpp - systemz dag lowering implementation
-===//
uweigand wrote:
This seems to be some accidental change? Please remove.
https:
@@ -4619,6 +4619,31 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
// Buffer is a void**.
Address Buf = EmitPointerWithAlignment(E->getArg(0));
+if (getTarget().getTriple().getArch() == llvm::Triple::systemz) {
+ // Call L
@@ -0,0 +1,255 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; Simulate register pressure around setjmp call for integer arguments.
+; Test assembly of funtion call foo in func() in setjmp if and else part.
+; extern foo
@@ -6292,6 +6534,10 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
return lowerGET_ROUNDING(Op, DAG);
case ISD::READCYCLECOUNTER:
return lowerREADCYCLECOUNTER(Op, DAG);
+ case ISD::EH_SJLJ_SETJMP:
+ case ISD::EH_SJLJ_LONGJMP:
+return Op;
--
@@ -0,0 +1,25 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 5
uweigand wrote:
I don't think we need a -backchain version of the test case here - what's
tested here is completely identical as far as the fro
@@ -0,0 +1,123 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
uweigand wrote:
Here I think it would be good to add one more test, to verify that the *frame
pointer* is saved if it is live - this is curren
@@ -4619,6 +4619,31 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
// Buffer is a void**.
Address Buf = EmitPointerWithAlignment(E->getArg(0));
+if (getTarget().getTriple().getArch() == llvm::Triple::systemz) {
+ // Call L
https://github.com/uweigand commented:
I think we're getting close now - but I still have a few comments below.
Thanks!
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cg
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -940,6 +945,240 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat
&Imm, EVT VT,
return SystemZVectorConstantInfo(Imm).isVectorConstantLegal(Subtarget);
}
+MachineBasicBlock *
+SystemZTargetLowering::emitEHSjLjSetJmp(MachineInstr &MI,
+
@@ -1883,6 +1931,10 @@ void SystemZInstrInfo::getLoadStoreOpcodes(const
TargetRegisterClass *RC,
} else if (RC == &SystemZ::FP128BitRegClass) {
LoadOpcode = SystemZ::LX;
StoreOpcode = SystemZ::STX;
+ } else if (RC == &SystemZ::FP16BitRegClass ||
+ RC ==
@@ -0,0 +1,34 @@
+;Test -mbackchain longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Backchain Value from Slot 3.
+; Stack Pointer from Slot 4.
+; Literal Pool Pointer from Slot 5.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O2 | FileCheck
@@ -0,0 +1,145 @@
+; Simulate register pressure around setjmp call for double precision
arguments.
+; Test assembly of funtion call foo in func() in setjmp if and else part.
+; extern foo has 20 argument pointer to double precision.
+; Test setjmp store jmp_buf.
+; Return addre
@@ -0,0 +1,24 @@
+;Test longjmp load from jmp_buf.
uweigand wrote:
Please fix the white spaces. Space after ';', only one space between words.
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing
https://github.com/uweigand commented:
Some additional comments on the test cases inline.
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commi
@@ -0,0 +1,34 @@
+;Test -mbackchain longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Backchain Value from Slot 3.
+; Stack Pointer from Slot 4.
+; Literal Pool Pointer from Slot 5.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O2 | FileCheck
@@ -0,0 +1,146 @@
+; -mbackchain option.
uweigand wrote:
Also, I don't think we need -mbackchain versions of all of those. We have the
simple tests above that verify -mbackchain works, we don't need to repeat this
for all other tests.
https://github.com/llvm
@@ -0,0 +1,24 @@
+;Test longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Stack Pointer from Slot 4.
+; Literal Pool Pointer from Slot 5.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O2 | FileCheck %s
+
+@buf = dso_local global [20 x ptr] z
@@ -0,0 +1,24 @@
+;Test longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Stack Pointer from Slot 4.
+; Literal Pool Pointer from Slot 5.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O2 | FileCheck %s
+
+@buf = dso_local global [20 x ptr] z
@@ -0,0 +1,145 @@
+; Simulate register pressure around setjmp call for double precision
arguments.
uweigand wrote:
There doesn't seem to be a -01 test with this name, please rename to remove
those gaps.
https://github.com/llvm/llvm-project/pull/116642
___
@@ -0,0 +1,47 @@
+; Test setjmp store jmp_buf
uweigand wrote:
Most of the above longjmp comments apply likewise to the setjmp tests.
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-co
@@ -0,0 +1,24 @@
+;Test longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Stack Pointer from Slot 4.
+; Literal Pool Pointer from Slot 5.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O2 | FileCheck %s
+
+@buf = dso_local global [20 x ptr] z
@@ -0,0 +1,145 @@
+; Simulate register pressure around setjmp call for double precision
arguments.
uweigand wrote:
Register pressure may indeed be a good reason to have a longer test. Still,
the CHECK statements should be auto-generated. Also, even here we s
@@ -0,0 +1,145 @@
+; Simulate register pressure around setjmp call for double precision
arguments.
+; Test assembly of funtion call foo in func() in setjmp if and else part.
+; extern foo has 20 argument pointer to double precision.
+; Test setjmp store jmp_buf.
+; Return addre
@@ -0,0 +1,75 @@
+; Test -mbackchain setjmp store jmp_buf
uweigand wrote:
See above.
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -0,0 +1,215 @@
+; Simulate register pressure around setjmp call for integer arguments and
+; return sum of 20 vaiables. It also prints the variables.
uweigand wrote:
See above comments on the -double tests.
https://github.com/llvm/llvm-project/pull/116642
_
@@ -0,0 +1,47 @@
+; Test setjmp store jmp_buf
+; Return address in slot 2.
+; Stack Pointer in slot 4.
+; Clobber %r6-%r15, %f8-%f15.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O3 | FileCheck %s
+
+@buf = dso_local global [20 x ptr] zeroinitializer, align 8
+
+; Function Attrs
@@ -0,0 +1,89 @@
+;Test longjmp load from jmp_buf.
uweigand wrote:
We certainly do not need to verify e.g. printf codegen here, so even if we do
need the test for some reason, it should be significantly simplified.
https://github.com/llvm/llvm-project/pull/116
@@ -0,0 +1,323 @@
+; Test for Frame Pointer in first slot in jmp_buf.
uweigand wrote:
Similar question here. This is a very long test, and only a couple of
instructions are tested via CHECK statements. Whatever we want to test here
should be done in a much mo
@@ -0,0 +1,24 @@
+;Test longjmp load from jmp_buf.
+; Frame pointer from Slot 1.
+; Jump address from Slot 2.
+; Stack Pointer from Slot 4.
+; Literal Pool Pointer from Slot 5.
+
+; RUN: llc < %s -mtriple=s390x-linux-gnu -O2 | FileCheck %s
+
+@buf = dso_local global [20 x ptr] z
@@ -0,0 +1,89 @@
+;Test longjmp load from jmp_buf.
uweigand wrote:
What is the added benefit of this combined test? This seems to have been
compiled from a C language test that would be useful to run as *execute* test
(which we cannot do here). But here we
@@ -0,0 +1,216 @@
+; Simulate register pressure around setjmp call for double precision
+; arguments and return sum of 20 vaiables. It also prints the variables.
uweigand wrote:
As this is not an executable test, I don't think the printf code-gen tests
anythin
@@ -1883,6 +1931,10 @@ void SystemZInstrInfo::getLoadStoreOpcodes(const
TargetRegisterClass *RC,
} else if (RC == &SystemZ::FP128BitRegClass) {
LoadOpcode = SystemZ::LX;
StoreOpcode = SystemZ::STX;
+ } else if (RC == &SystemZ::FP16BitRegClass ||
+ RC ==
@@ -47,8 +49,11 @@ def LDR : UnaryRR <"ldr", 0x28, null_frag, FP64, FP64>;
def LXR : UnaryRRE<"lxr", 0xB365, null_frag, FP128, FP128>;
// For z13 we prefer LDR over LER to avoid partial register dependencies.
-let isCodeGenOnly = 1 in
- def LDR32 : UnaryRR<"ldr", 0x28, nul
@@ -1883,6 +1931,10 @@ void SystemZInstrInfo::getLoadStoreOpcodes(const
TargetRegisterClass *RC,
} else if (RC == &SystemZ::FP128BitRegClass) {
LoadOpcode = SystemZ::LX;
StoreOpcode = SystemZ::STX;
+ } else if (RC == &SystemZ::FP16BitRegClass ||
+ RC ==
@@ -513,11 +514,26 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ // Promote all f16 operations to float, with some exceptions below.
+ for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
+setOperati
uweigand wrote:
> Improved handling to utilize vector instructions when present.
Thanks!
>New VR16 regclass, but v8f16 _not_ legal. It might make sense to have it as a
>legal type and e.g. do VL;VST when moving vectors in memory, and also set all
>vector ops to "Expand". Not sure how trivial
uweigand wrote:
Hi @anoopkg6 , the tests are still failing in CI because this is hosted on an
Intel machine, so when you run just with `llc`, it will attempt to build the
test for Intel ...
To make sure the tests run correctly and always target s390x, you should use
something along the follow
@@ -102,6 +102,7 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);
addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass);
if (!useSoftFloat()) {
+addRegisterClass(MVT::f16, &SystemZ::FP16
@@ -513,11 +514,26 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ // Promote all f16 operations to float, with some exceptions below.
+ for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
+setOperati
@@ -513,11 +514,37 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
}
// Handle floating-point types.
+ // Promote all f16 operations to float, with some exceptions below.
+ for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc)
+setOperati
@@ -4619,6 +4619,12 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
// Buffer is a void**.
Address Buf = EmitPointerWithAlignment(E->getArg(0));
+if (getTarget().getTriple().getArch() == llvm::Triple::systemz) {
+ // Call L
@@ -102,6 +102,7 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
addRegisterClass(MVT::i32, &SystemZ::GR32BitRegClass);
addRegisterClass(MVT::i64, &SystemZ::GR64BitRegClass);
if (!useSoftFloat()) {
+addRegisterClass(MVT::f16, &SystemZ::FP16
@@ -940,7 +947,242 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat
&Imm, EVT VT,
return SystemZVectorConstantInfo(Imm).isVectorConstantLegal(Subtarget);
}
-/// Returns true if stack probing through inline assembly is requested.
+
+MachineBasicBlock *
+SystemZTarge
@@ -6292,6 +6534,10 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
return lowerGET_ROUNDING(Op, DAG);
case ISD::READCYCLECOUNTER:
return lowerREADCYCLECOUNTER(Op, DAG);
+ case ISD::EH_SJLJ_SETJMP:
+ case ISD::EH_SJLJ_LONGJMP:
+return Op;
--
@@ -4619,6 +4619,12 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
// Buffer is a void**.
Address Buf = EmitPointerWithAlignment(E->getArg(0));
+if (getTarget().getTriple().getArch() == llvm::Triple::systemz) {
+ // Call L
@@ -940,7 +947,242 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat
&Imm, EVT VT,
return SystemZVectorConstantInfo(Imm).isVectorConstantLegal(Subtarget);
}
-/// Returns true if stack probing through inline assembly is requested.
+
+MachineBasicBlock *
+SystemZTarge
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/116642
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand commented:
Not a full review, but some general comments inline.
https://github.com/llvm/llvm-project/pull/109164
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-com
@@ -940,7 +947,242 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat
&Imm, EVT VT,
return SystemZVectorConstantInfo(Imm).isVectorConstantLegal(Subtarget);
}
-/// Returns true if stack probing through inline assembly is requested.
+
+MachineBasicBlock *
+SystemZTarge
@@ -723,6 +729,7 @@ class SystemZTargetLowering : public TargetLowering {
SDValue lowerGET_ROUNDING(SDValue Op, SelectionDAG &DAG) const;
SDValue lowerREADCYCLECOUNTER(SDValue Op, SelectionDAG &DAG) const;
+
uweigand wrote:
This shouldn't be here.
https:
@@ -940,7 +947,242 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat
&Imm, EVT VT,
return SystemZVectorConstantInfo(Imm).isVectorConstantLegal(Subtarget);
}
-/// Returns true if stack probing through inline assembly is requested.
+
+MachineBasicBlock *
+SystemZTarge
@@ -751,6 +751,13 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
setOperationAction(ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
+ // We're not using SJLJ for exception handling, b
@@ -0,0 +1,72 @@
+; Test output of setjmp/longjmp.
+; RUN: clang -o %t %s
+; RUN: %t | FileCheck %s
uweigand wrote:
Ah. This is a problem. The unit tests here cannot be execution tests;
they'll have to run on any host system (e.g. on the automated CI on GitHu
@@ -4619,6 +4619,12 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl
GD, unsigned BuiltinID,
// Buffer is a void**.
Address Buf = EmitPointerWithAlignment(E->getArg(0));
+if (getTarget().getTriple().getArch() == llvm::Triple::systemz) {
+ // Call L
https://github.com/uweigand commented:
Thanks for the contribution! Please find a number of comments inline. Also,
you should address the issues found by the CI, e.g. about coding style.
https://github.com/llvm/llvm-project/pull/116642
___
cfe-comm
@@ -940,7 +947,242 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat
&Imm, EVT VT,
return SystemZVectorConstantInfo(Imm).isVectorConstantLegal(Subtarget);
}
-/// Returns true if stack probing through inline assembly is requested.
+
+MachineBasicBlock *
+SystemZTarge
@@ -6285,6 +6465,16 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
return lowerAddrSpaceCast(Op, DAG);
case ISD::ROTL:
return lowerShift(Op, DAG, SystemZISD::VROTL_BY_SCALAR);
+ case ISD::FP_EXTEND:
+//case ISD::STRICT_FP_EXTEND:
uweiga
https://github.com/uweigand edited
https://github.com/llvm/llvm-project/pull/109164
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -91,11 +91,28 @@ class LLVM_LIBRARY_VISIBILITY SystemZTargetInfo : public
TargetInfo {
"-v128:64-a:8:16-n32:64");
}
MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 128;
+
+// True if the backend supports operations on the half LLVM IR type.
@@ -6108,6 +6160,133 @@ static SDValue lowerAddrSpaceCast(SDValue Op,
SelectionDAG &DAG) {
return Op;
}
+SDValue SystemZTargetLowering::LowerFP_EXTEND(SDValue Op,
+ SelectionDAG &DAG) const {
+ bool IsStrict = Op->isStrictFPOpco
@@ -6108,6 +6160,133 @@ static SDValue lowerAddrSpaceCast(SDValue Op,
SelectionDAG &DAG) {
return Op;
}
+SDValue SystemZTargetLowering::LowerFP_EXTEND(SDValue Op,
+ SelectionDAG &DAG) const {
+ bool IsStrict = Op->isStrictFPOpco
@@ -185,6 +185,8 @@ bool SystemZABIInfo::isFPArgumentType(QualType Ty) const {
if (const BuiltinType *BT = Ty->getAs())
switch (BT->getKind()) {
+case BuiltinType::Half: // __fp16
uweigand wrote:
Then I think we shouldn't have this either.
http
@@ -0,0 +1,201 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 | FileCheck %s
+;
+; Tests for 16-bit floating point (half).
+
+; Incoming half arguments added together and
@@ -1597,6 +1618,15 @@ bool SystemZTargetLowering::splitValueIntoRegisterParts(
return true;
}
+ // Convert f16 to f32 (Out-arg).
+ if (PartVT == MVT::f16) {
+assert(NumParts == 1 && "");
+SDValue I16Val = DAG.getBitcast(MVT::i16, Val);
+SDValue I32Val = DA
@@ -711,6 +711,13 @@ SystemZTargetLowering::SystemZTargetLowering(const
TargetMachine &TM,
setOperationAction(ISD::BITCAST, MVT::f32, Custom);
}
+ // Expand FP16 <=> FP32 conversions to libcalls and handle FP16 loads and
+ // stores in GPRs.
+ setOperationAction(ISD:
@@ -1612,6 +1642,18 @@ SDValue
SystemZTargetLowering::joinRegisterPartsIntoValue(
return SDValue();
}
+// F32Val holds a f16 value in f32, return it as an f16 (In-arg). The
+// CopyFromReg was made into an f32 as required as FP32 registers are used
+// for arguments, now co
@@ -16534,7 +16534,7 @@ ExprResult Sema::BuildVAArgExpr(SourceLocation
BuiltinLoc,
PromoteType = QualType();
}
}
-if (TInfo->getType()->isSpecificBuiltinType(BuiltinType::Float))
+if (TInfo->getType()->isFloat16Type() || TInfo->getType()->isFloat32T
uweigand wrote:
> My understanding is that in GCC's `__gnu_h2f_ieee`/`__gnu_f2h_ieee` is always
> `i32`<->`i16` (integer ABI), then `__extendhfsf2`/`__truncsfhf2` uses either
> `int16_t` or `_Float16` on a per-target basis as controlled by
> `__LIBGCC_HAS_HF_MODE__` (I don't know where this g
uweigand wrote:
I think we should define and implement a proper ABI for the half type as well.
https://github.com/llvm/llvm-project/pull/109164
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-
uweigand wrote:
Looks like the new test case is failing on SystemZ:
https://lab.llvm.org/buildbot/#/builders/42/builds/1192
```
struct.error: unpack_from requires a buffer of at least 402653196 bytes for
unpacking 12 bytes at offset 402653184 (actual buffer size is 479)
```
At first glance, thi
@@ -532,9 +532,371 @@ bool SystemZTargetCodeGenInfo::isVectorTypeBased(const
Type *Ty,
return false;
}
+//===--===//
+// z/OS XPLINK ABI Implementation
+//===
uweigand wrote:
LGTM as well, thanks.
https://github.com/llvm/llvm-project/pull/100757
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
Author: Ulrich Weigand
Date: 2024-09-19T13:19:03+02:00
New Revision: baf9b7da81025c1e3b0704d7ecf667e06f95642b
URL:
https://github.com/llvm/llvm-project/commit/baf9b7da81025c1e3b0704d7ecf667e06f95642b
DIFF:
https://github.com/llvm/llvm-project/commit/baf9b7da81025c1e3b0704d7ecf667e06f95642b.diff
uweigand wrote:
SystemZ changes LGTM.
https://github.com/llvm/llvm-project/pull/109160
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
@@ -532,9 +532,371 @@ bool SystemZTargetCodeGenInfo::isVectorTypeBased(const
Type *Ty,
return false;
}
+//===--===//
+// z/OS XPLINK ABI Implementation
+//===
@@ -532,9 +532,371 @@ bool SystemZTargetCodeGenInfo::isVectorTypeBased(const
Type *Ty,
return false;
}
+//===--===//
+// z/OS XPLINK ABI Implementation
+//===
https://github.com/uweigand requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/101024
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
https://github.com/uweigand approved this pull request.
LGTM now, thanks!
https://github.com/llvm/llvm-project/pull/91384
___
cfe-commits mailing list
cfe-commits@lists.llvm.org
https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits
uweigand wrote:
Turns out transparent union handling was indeed broken in the SystemZ ELF ABI
as well. I've now checked in a fix here:
https://github.com/llvm/llvm-project/commit/9af3628ce7400a96205a4c4468867c3c11dd4b2f
https://github.com/llvm/llvm-project/pull/91384
_
1 - 100 of 245 matches
Mail list logo
