================
@@ -1612,6 +1642,18 @@ SDValue
SystemZTargetLowering::joinRegisterPartsIntoValue(
return SDValue();
}
+// F32Val holds a f16 value in f32, return it as an f16 (In-arg). The
+// CopyFromReg was made into an f32 as required as FP32 registers are used
+// for arguments, now convert it to f16.
+static SDValue convertF32ToF16(SDValue F32Val, SelectionDAG &DAG,
+ const SDLoc &DL) {
+ assert(F32Val->getOpcode() == ISD::CopyFromReg &&
+ "Only expecting to handle f16 with CopyFromReg here.");
+ SDValue I32Val = DAG.getBitcast(MVT::i32, F32Val);
+ SDValue I16Val = DAG.getAnyExtOrTrunc(I32Val, DL, MVT::i16);
----------------
uweigand wrote:
Likewise here?
https://github.com/llvm/llvm-project/pull/109164
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