[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D159250/new/ https://reviews.llvm.org/D159250 ___ cfe

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:277 + + if (posAVX512F != StringRef::npos && + (posNoAVX512F == StringRef::npos || posNoAVX512F < posAVX512F)) Well. It's a very tricky implementation, but I can find out a better

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:271 + // Attach EVEX512 feature when we have AVX512 features and EVEX512 is not set. + size_t posNoEVEX512 = FS.rfind("-evex512"); It seems the change in X86.cpp is redundant? Rep

[PATCH] D159250: [X86][RFC] Add new option `-m[no-]evex512` to disable ZMM and 64-bit mask instructions for AVX512 features

skan added inline comments. Comment at: llvm/lib/Target/X86/X86Subtarget.cpp:275 + size_t posEVEX512 = FS.rfind("+evex512"); + size_t posAVX512F = FS.rfind("+avx512"); + Missing f? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://rev

[PATCH] D158252: Fix regression of D157680

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158252/new/ https://reviews.llvm.org/D158252 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D158137: Change -ffp-model= related warn_drv_overriding_flag_option to warn_drv_overriding_option

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D158137/new/ https://reviews.llvm.org/D158137 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D157485/new/ https://reviews.llvm.org/D157485 ___ cfe

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp:927 + !STI.hasFeature(X86::FeatureAVX10_512bit)) +report_fatal_error("ZMM registers are not supported without AVX10-512BIT"); switch (TSFlags & X86II::OpPrefixMask) { ---

[PATCH] D157485: [X86][RFC] Support new feature AVX10

skan added inline comments. Comment at: clang/lib/CodeGen/CodeGenFunction.cpp:2581 + unsigned VectorWidth) { + if (!getTarget().getTriple().isX86() || VectorWidth < 512) +return; Minor suggestion. The code here may

[PATCH] D157680: [X86]Support options -mno-gather -mno-scatter

skan added inline comments. Comment at: llvm/lib/Target/X86/X86.td:437 +: SubtargetFeature<"prefer-no-gather", "PreferGather", "false", + "Indicates if gather prefer to be disabled">; +def FeaturePreferNoScatter Does "Prefer no gather in

[PATCH] D156962: [Driver] Mark m_x86_Features_Group options as TargetSpecific

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D156962/new/ https://reviews.llvm.org/D156962 ___ cfe

[PATCH] D155798: [X86] Support -march=graniterapids-d and update -march=graniterapids

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155798/new/ https://reviews.llvm.org/D155798 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D155784: [X86] Update features for sierraforest, grandridge

skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155784/new/ https://reviews.llvm.org/D155784 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bi

[PATCH] D155148: [X86] Add SM4 instructions.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155148/new/ https://reviews.llvm.org/D155148 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D155146: Add SHA512 instructions.

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D155146/new/ https://reviews.llvm.org/D155146 ___ cfe

[PATCH] D155147: Add SM3 instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8331 +VR128:$src2, (loadv4i32 addr:$src3), timm:$src4))]>, + Sched<[WriteVecIMul]>; + } Is the schedule appropriate? Comment at: llvm/test/

[PATCH] D155148: Add SM4 instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrSSE.td:8308 +RC:$src2))]>, + Sched<[WriteVecIMul]>; +def rm : I<0xda, MRMSrcMem, (outs RC:$dst), From the description, it seems that `WriteVecIMul` is not the rig

[PATCH] D154493: [X86] Support some Intel CPUs for cpu_specific/dispatch feature

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D154493/new/ https://reviews.llvm.org/D154493 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D153714: [NFC] Add missing cpu tests in predefined-arch-macros.c

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D153714/new/ https://reviews.llvm.org/D153714 ___ cfe

[PATCH] D152989: Pre-commit test for D151696.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152989/new/ https://reviews.llvm.org/D152989 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D152989: Pre-commit test for D151696.

skan added inline comments. Comment at: clang/test/CodeGen/attr-cpuspecific-cpus.c:12 + +ATTR(cpu_specific(generic)) void CPU0(void){} +ATTR(cpu_specific(pentium)) void CPU1(void){} FreddyYe wrote: > skan wrote: > > Shouldn't we use the same function name? > Emmm

[PATCH] D152989: Pre-commit test for D151696.

skan added inline comments. Comment at: clang/test/CodeGen/attr-cpuspecific-cpus.c:12 + +ATTR(cpu_specific(generic)) void CPU0(void){} +ATTR(cpu_specific(pentium)) void CPU1(void){} Shouldn't we use the same function name? Repository: rG LLVM Github Monorepo

[PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM for the MC part. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D152785/new/ https://reviews.llvm.org/D152785 __

[PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows

skan added inline comments. Comment at: llvm/lib/DebugInfo/DWARF/DWARFContext.cpp:1896 +// Each section in COFF can directly contain relocations. +if (isa(&Obj) && Section.relocations().empty()) + continue; Should we merge the check into

[PATCH] D152785: [COFF] Support -gsplit-dwarf for COFF on Windows

skan added inline comments. Comment at: llvm/lib/DebugInfo/DWARF/DWARFContext.cpp:1895 + if (RelocatedSection != Obj.section_end() && Name.contains(".dwo")) { +// Each section in COFF can directly contain relocations. +if (isa(&Obj) && Section.relocations().e

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151863/new/ https://reviews.llvm.org/D151863 ___ cfe

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added inline comments. Comment at: llvm/test/MC/X86/x86-64-movdir64b-intel.s:1 +// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s +// CHECK: movdir64b rax, zmmword ptr [rax - 4096] a

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:1780 // Otherwise, we set the base register to a non-zero value - // if we don't know the actual value at this time. This is necessary to + // if we don't know the actual value at this ti

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added inline comments. Comment at: llvm/test/MC/X86/x86-64-movdir64b-intel.s:1 +// RUN: llvm-mc -triple x86_64-unknown-unknown -x86-asm-syntax=intel -output-asm-variant=1 --show-encoding %s | FileCheck %s +// CHECK: movdir64b rax, zmmword ptr [rax - 4096] T

[PATCH] D151863: [x86][MC] Fix movdir64b addressing

skan added a comment. Replace the url of the picture in the summary with the plain text? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D151863/new/ https://reviews.llvm.org/D151863 ___ cfe-commits mailing

[PATCH] D147525: [X86] Add AMX_COMPLEX to Graniterapids

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D147525/new/ https://reviews.llvm.org/D147525 ___ cfe

[PATCH] D140950: [X86] Support -march=emeraldrapids

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D140950/new/ https://reviews.llvm.org/D140950 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D140531: [X86] Add reduce_*_ep[i|u]8/16 series intrinsics.

skan accepted this revision. skan added inline comments. Comment at: clang/test/CodeGen/X86/avx512vlbw-reduceIntrin.c:115 + +char test_mm_reduce_mul_epi8(__m128i __W){ +// CHECK-LABEL: @test_mm_reduce_mul_epi8( FreddyYe wrote: > skan wrote: > > skan wrote: > > >

[PATCH] D140531: [X86] Add reduce_*_ep[i|u]8/16 series intrinsics.

skan added inline comments. Comment at: clang/test/CodeGen/X86/avx512vlbw-reduceIntrin.c:115 + +char test_mm_reduce_mul_epi8(__m128i __W){ +// CHECK-LABEL: @test_mm_reduce_mul_epi8( skan wrote: > char has different meaning on different platforms. Should we use "s

[PATCH] D140531: [X86] Add reduce_*_ep[i|u]8/16 series intrinsics.

skan added inline comments. Comment at: clang/lib/Headers/avx512vlbwintrin.h:2997 + +static __inline__ char __DEFAULT_FN_ATTRS128 +_mm_reduce_or_epi8(__m128i __W) { Should we update here too? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION ht

[PATCH] D140531: [X86] Add reduce_*_ep[i|u]8/16 series intrinsics.

skan added inline comments. Comment at: clang/docs/ReleaseNotes.rst:806 - Lift _BitInt() supported max width from 128 to 8388608. +- Support *_reduce_*_ep[i|u]8/16 series intrinsics. This is not clear to me, try sth like "mm*_reduce_(add|and|max)_epi" and put

[PATCH] D137153: [X86] Support -march=sierraforest, grandridge, graniterapids.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86.td:949 + FeatureAMXINT8, + FeatureAMXBF16, + FeatureBF16]; --

[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135938/new/ https://reviews.llvm.org/D135938 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D135932: [X86] Add AVX-IFMA instructions.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135932/new/ https://reviews.llvm.org/D135932 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D135933/new/ https://reviews.llvm.org/D135933 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrInfo.td:3027 +def CMPCCXADDmr32 : I<0xe0, MRMDestMem4VOp3CC, (outs GR32:$dst), + (ins GR32:$dstsrc2, i32mem:$dstsrc1, GR32:$src3, ccode:$cond), + "cmp${cond}xadd\t{$src3, $dst, $dstsrc1|$dstsrc1

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp:32 int64_t Imm = MI->getOperand(Op).getImm(); + bool flavor = MI->getOpcode() == X86::CMPCCXADDmr32 || X86::CMPCCXADDmr64; switch (Imm) { Capitalize 1st char

[PATCH] D135938: [X86] Add AVX-VNNI-INT8 instructions.

skan added inline comments. Comment at: llvm/include/llvm/Support/X86TargetParser.def:205 X86_FEATURE (AVX512FP16, "avx512fp16") +X86_FEATURE (AVXVNNIINT8, "avxvnniint8") X86_FEATURE (AVXVNNI, "avxvnni") Move it after AVXVNNI

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan added inline comments. Comment at: clang/lib/Headers/cmpccxaddintrin.h:19-34 + _CMPCCX_O, /* Overflow. */ + _CMPCCX_NO, /* No overflow. */ + _CMPCCX_B, /* Below. */ + _CMPCCX_NB, /* Not below. */ + _CMPCCX_Z, /* Zero. */ + _CMPCCX_NZ, /* Not zero. */ +

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrInfo.td:3035 + "cmp${cond}xadd\t{$src3, $dst, $dstsrc1|$dstsrc1, $dst, $src3}", + [(set GR64:$dst, (X86cmpccxadd addr:$dstsrc1, GR64:$dstsrc2, GR64:$src3, timm:$cond))]>, + VEX_4V, VEX

[PATCH] D135932: [X86] Add AVX-IFMA instructions.

skan added inline comments. Comment at: clang/lib/Basic/Targets/X86.cpp:781 +Builder.defineMacro("__AVXIFMA__"); + Builder.defineMacro("__AVXIFMA_SUPPORTED__"); if (HasAVXVNNI) Why do we need this line? Repository: rG LLVM Github Monorepo CHANGES SIN

[PATCH] D135937: [WIP][X86] Support -march=raptorlake, meteorlake

skan added inline comments. Comment at: compiler-rt/lib/builtins/cpu_model.c:111 + ZHAOXIN_FAM7H_LUJIAZUI, + INTEL_COREI7_RAPTORLAKE, + INTEL_COREI7_METEORLAKE, I see. But if possible, could we split "ZHAOXIN_FAM7H_LUJIAZUI" to another patch? Repository:

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86InstrInfo.td:3028 + (ins i32mem:$dstsrc1, GR32:$dstsrc2, GR32:$src3, ccode:$cond), + "cmp${cond}xadd\t{$src3, $dst, $dstsrc1|$dstsrc1, $dst, $src3}", + [(set GR32:$dst, (X86cmpccxadd addr:$d

[PATCH] D135933: [X86] Add CMPCCXADD instructions.

skan added inline comments. Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:28251 + SDLoc DL(Op); + SDVTList VTs = DAG.getVTList(MVT::i32, MVT::Other); + SDValue Chain = Op.getOperand(0); Unused? Comment at: llvm/lib/Target/X

[PATCH] D135937: [X86] Support -march=raptorlake, meteorlake

skan added inline comments. Comment at: compiler-rt/lib/builtins/cpu_model.c:110 INTEL_COREI7_ROCKETLAKE, + ZHAOXIN_FAM7H_LUJIAZUI, + INTEL_COREI7_RAPTORLAKE, typo ? (ZHAOXIN_FAM7H_LUJIAZUI) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION

[PATCH] D107082: [X86][RFC][WIP] Enable `_Float16` type support on X86 following the psABI

skan added inline comments. Comment at: llvm/docs/ReleaseNotes.rst:136 -* ... +* Support ``half`` type on SSE2 and above targets. Just for curiosity, why is SSE2? Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:593 +// Half type w

[PATCH] D124435: [X86] Always extend the integer parameters in callee

skan added a comment. Should we update the `clang/docs/ReleaseNotes.rst` for this? Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D124435/new/ https://reviews.llvm.org/D124435 ___ cfe-commits mailing list

[PATCH] D120395: [X86] Prohibit arithmetic operations on type `__bfloat16`

skan added a comment. In D120395#3365622 , @craig.topper wrote: >> So at this point we have these options: >> >> 1. Make the `__m[128|256|512]bh` types aliases of `__m[128|256|512]i` >> 2. Deprecate the `__m[128|256|512]bh` types and replace them with >

[PATCH] D107141: [Inline-asm] Add diagnosts for unsupported inline assembly arguments

skan added inline comments. Comment at: clang/test/Sema/asm.c:318-346 +typedef struct test19_a { + int a; + char b; +} test19_a; + +typedef struct test19_b { + int a; Better to add comments about the size of the struct. Comment at: clang/tes

[PATCH] D119846: [NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter`

skan added a comment. @achieveartificialintelligence Please explain why a patch is reverted in the commit message next time. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D119846/new/ https://reviews.llvm.org/D119846 _

[PATCH] D119846: [NFC][MC] remove unused argument `MCRegisterInfo` in `MCCodeEmitter`

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. `MCRegisterInfo` is not used b/c it can be got from `MCContext`. It makes sense to remove it in the parameters. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.

[PATCH] D116090: [X86][MS-InlineAsm] Use exact conditions to recognize MS global variables

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. Thank you for the fix! LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D116090/new/ https://reviews.llvm.org/D116090

[PATCH] D115611: [X86][BF16] delete `typedef unsigned short __bfloat16`

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115611/new/ https://reviews.llvm.org/D115611 ___ cfe

[PATCH] D115225: [X86][MS-InlineAsm] Make the constraint *m to be simple place holder

skan accepted this revision. skan added a comment. This revision is now accepted and ready to land. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D115225/new/ https://reviews.llvm.org/D115225 ___ cfe

[PATCH] D115225: [X86][MS-InlineAsm] Make the constraint *m to be simple place holder

skan added inline comments. Comment at: clang/test/CodeGen/ms-inline-asm-functions.c:42 __asm mov eax, k; - // CHECK: movl_k, %eax + // CHECK: movlk, %eax __asm mov eax, kptr; This change is strange here. Others looks good to me. Repository: r

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan added a comment. In D113096#3110546 , @skan wrote: > In D113096#3110507 , @thakis wrote: > >> Looks like this breaks tests on Mac: http://45.33.8.238/mac/38266/step_11.txt >> >> Please take a look and revert

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan added a comment. In D113096#3110507 , @thakis wrote: > Looks like this breaks tests on Mac: http://45.33.8.238/mac/38266/step_11.txt > > Please take a look and revert for now if it takes a while to fix. I can quickly fix it. It's the issue of ambig

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

This revision was automatically updated to reflect the committed changes. Closed by commit rGbe08e452f366: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D113096/

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan marked 3 inline comments as done. skan added inline comments. Comment at: llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp:1759 // It is widely common for MS InlineAsm to use a global variable and one/two // registers in a mmory expression, and though unaccessible via ri

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan marked 3 inline comments as done. skan added inline comments. Comment at: clang/test/CodeGen/ms-inline-asm-static-variable.c:8 + // CHECK: @arr = internal global [10 x i32] + // CHECK: call void asm sideeffect inteldialect "mov dword ptr $0[edx * $$4],edx", "=*m,{{.*}}([1

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan marked 2 inline comments as done. skan added inline comments. Comment at: llvm/test/CodeGen/X86/ms-inline-asm-array.ll:15-22 +!llvm.module.flags = !{!0, !1, !2} +!llvm.ident = !{!3} + +!0 = !{i32 1, !"wchar_size", i32 4} +!1 = !{i32 7, !"uwtable", i32 1} +!2 = !{i32 7, !"fra

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan marked 3 inline comments as done. skan added inline comments. Comment at: clang/test/CodeGen/ms-inline-asm-static-variable.c:8 + // CHECK: @arr = internal global [10 x i32] + // CHECK: call void asm sideeffect inteldialect "mov dword ptr $0[edx * $$4],edx", "=*m,{{.*}}([1

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan updated this revision to Diff 384401. skan added a comment. clang-format the diff Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D113096/new/ https://reviews.llvm.org/D113096 Files: clang/test/CodeGen/X86/ms_fmul.c clang/test/CodeGen/ms-inl

[PATCH] D113096: [X86][MS-InlineAsm] Add constraint *m for memory access w/ global var

skan created this revision. Herald added subscribers: pengfei, hiraditya. skan requested review of this revision. Herald added projects: clang, LLVM. Herald added subscribers: llvm-commits, cfe-commits. Constraint `*m` should be used when the address of a variable is passed as a value. And the con

[PATCH] D111517: [X86] Remove little support we had for MPX

skan accepted this revision. skan added a comment. LGTM Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D111517/new/ https://reviews.llvm.org/D111517 ___ cfe-commits mailing list cfe-commits@lists.llvm.org

[PATCH] D100085: [X86] Support -march=rocketlake

skan accepted this revision. skan added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:176 FeaturesBroadwell | FeatureAES | FeatureCLFLUSHOPT | FeatureXSAVEC | FeatureXSAVES | FeatureSGX; // SkylakeServer inherits all SkylakeClient features except SG

[PATCH] D100085: [X86] Support -march=rocketlake

skan added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:176 FeaturesBroadwell | FeatureAES | FeatureCLFLUSHOPT | FeatureXSAVEC | FeatureXSAVES | FeatureSGX; // SkylakeServer inherits all SkylakeClient features except SGX. Shouldn't

[PATCH] D100085: [X86] Support -march=rocketlake

skan added inline comments. Comment at: llvm/lib/Target/X86/X86.td:271-273 -def FeatureSGX : SubtargetFeature<"sgx", "HasSGX", "true", - "Enable Software Guard Extensions">; def FeatureCLFLUSHOPT : SubtargetFeature<"clflushopt", "HasCLFLU

[PATCH] D100085: [X86] Support -march=rocketlake

skan added inline comments. Comment at: llvm/lib/Support/X86TargetParser.cpp:293-301 +// Empty processor. Include X87 and CMPXCHG8 for backwards compatibility. +{{""}, CK_None, ~0U, FeatureX87 | FeatureCMPXCHG8B}, +// i386-generation processors. +{{"i386"}, CK_i38

[PATCH] D81388: [TEST] TreeTest.cpp - Add a comma to avoid build error with -werror

This revision was automatically updated to reflect the committed changes. Closed by commit rG2c63ea6eded3: [TEST] TreeTest.cpp - Add a comma to avoid build error with -werror (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81388/new

[PATCH] D81388: [TEST] TreeTest.cpp - Add a comma to avoid build error with -werror

skan added a comment. Related revision: D80822 Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D81388/new/ https://reviews.llvm.org/D81388 ___ cfe-commits mailing list cf

[PATCH] D81388: [TEST] TreeTest.cpp - Add a comma to avoid build error with -werror

skan created this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. skan added reviewers: gribozavr, hlopko, eduucaldas. The macro `INSTANTIATE_TEST_CASE_P` is defined as \# define INSTANTIATE_TEST_CASE_P(prefix, test_case_name, generator, ...) \ ... If we buil

[PATCH] D80289: [Driver][X86] Support branch align options with LTO

This revision was automatically updated to reflect the committed changes. skan marked an inline comment as done. Closed by commit rG495444999549: [Driver][X86] Support branch align options with LTO (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://revi

[PATCH] D80289: [Driver][X86] Support branch align options with LTO

skan marked an inline comment as done. skan added inline comments. Comment at: clang/test/Driver/x86-malign-branch.c:6 // BOUNDARY: "-mllvm" "-x86-align-branch-boundary=16" +// RUN: %clang -target x86_64-unknown-linux -malign-branch-boundary=16 -flto %s -### 2>&1 | FileCheck %s

[PATCH] D80289: [Driver][X86] Support branch align options with LTO

skan added a comment. Ping. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80289/new/ https://reviews.llvm.org/D80289 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-b

[PATCH] D80289: [Driver][X86] Support branch align options with LTO

skan updated this revision to Diff 265423. skan marked an inline comment as done. skan added a comment. Refactor addX86AlignBranchArgs to be reused in CommonArgs.cpp Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80289/new/ https://reviews.llvm.org/

[PATCH] D80289: [Driver][X86] Support branch align options with LTO

skan updated this revision to Diff 265408. skan marked an inline comment as done. skan added a comment. Move tests to x86-malign-branch.c Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D80289/new/ https://reviews.llvm.org/D80289 Files: clang/lib/D

[PATCH] D80289: [Driver][X86] Support branch align options with LTO

skan created this revision. Herald added subscribers: cfe-commits, dexonsmith, steven_wu, hiraditya, inglorion. Herald added a project: clang. Repository: rG LLVM Github Monorepo https://reviews.llvm.org/D80289 Files: clang/lib/Driver/ToolChains/CommonArgs.cpp clang/test/Driver/lto.c Ind

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan added a comment. After careful consideration, I agree with @MaskRay ’s point of view that this alias is incorrect since they do different things. If there is no objection, I plan to abandon this revision. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.l

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan updated this revision to Diff 256308. skan added a comment. Fix the tests after rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77728/new/ https://reviews.llvm.org/D77728 Files: clang/include/clang/Driver/Options.td clang/test/Driver

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan updated this revision to Diff 256268. skan edited the summary of this revision. skan added a comment. Rebase(didn't rebase correctly last time) Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77728/new/ https://reviews.llvm.org/D77728 Files:

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan updated this revision to Diff 256250. skan added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77728/new/ https://reviews.llvm.org/D77728 Files: clang/include/clang/Driver/Options.td clang/test/Driver/x86-malign-branch.c

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

This revision was automatically updated to reflect the committed changes. Closed by commit rG792b10978dfd: [Driver][X86] Add -mpad-max-prefix-size (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77628/new/ https://reviews.llvm.org/

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan added a comment. In D77728#1970922 , @MaskRay wrote: > In D77728#1970912 , @skan wrote: > > > In D77728#1969788 , @MaskRay wrote: > > > > > > Make -malign-branch-prefix-

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

skan updated this revision to Diff 256164. skan added a comment. Remove the limit "max padding prefix size <=5" since MC doesn't have this limit. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77628/new/ https://reviews.llvm.org/D77628 Files: cla

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

skan added a comment. In D77628#1969856 , @MaskRay wrote: > This looks like it requires more thorough discussions, doesn't it? We will > also need discussions with the binutils side. We requested a GCC compiler > driver option long ago but we do not re

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan added a comment. In D77728#1969788 , @MaskRay wrote: > > Make -malign-branch-prefix-size an alias for -mpad-max-prefix-size (For GCC > > compatibility) > > I cannot find a discussion on -mpad-max-prefix-size. Is it a planned GNU as > option or GCC d

[PATCH] D77728: [Driver][X86] Add an alias for -mpad-max-prefix-size

skan created this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. skan added a parent revision: D77628: [Driver][X86] Add -mpad-max-prefix-size. Make -malign-branch-prefix-size an alias for -mpad-max-prefix-size (For GCC compatibility) Repository: rG LLVM Githu

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

skan updated this revision to Diff 255953. skan added a comment. Rebase Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77628/new/ https://reviews.llvm.org/D77628 Files: clang/include/clang/Driver/Options.td clang/lib/Driver/ToolChains/Clang.cpp

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

skan added a comment. The remote build failed due to a bug of Pre-merge checks, which tried to apply a landed patch. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77628/new/ https://reviews.llvm.org/D77628 __

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

skan updated this revision to Diff 255583. skan added a comment. format the patch Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D77628/new/ https://reviews.llvm.org/D77628 Files: clang/include/clang/Driver/Options.td clang/lib/Driver/ToolChains

[PATCH] D77628: [Driver][X86] Add -mpad-max-prefix-size

skan created this revision. Herald added a project: clang. Herald added a subscriber: cfe-commits. skan edited the summary of this revision. The option `-mpad-max-prefix-size` performs some checking and delegate to MC option `-x86-pad-max-prefix-size`. This option is designed for eliminate NOPs

[PATCH] D75723: [X86] Enable intrinsics _BitScan*

skan abandoned this revision. skan added a comment. Reconsidered the advice of @rnk , we can use `-fms-extensions` to supported _BitScan* on linux. Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75723/new/ https://reviews.llvm.org/D75723 ___

[PATCH] D75897: [X86] Support intrinsic _mm_broadcastsi128_si256

This revision was automatically updated to reflect the committed changes. Closed by commit rG214d24e1f8e0: [X86] Support intrinsic _mm_broadcastsi128_si256 (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75897/new/ https://reviews.

[PATCH] D75896: [X86] Support intrinsic _mm_cldemote

This revision was automatically updated to reflect the committed changes. Closed by commit rGab69cd0779c5: [X86] Support intrinsic _mm_cldemote (authored by skan). Repository: rG LLVM Github Monorepo CHANGES SINCE LAST ACTION https://reviews.llvm.org/D75896/new/ https://reviews.llvm.org/D75

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