[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

jdoerfert wrote: > I'm concerned about the soundness of our current implementation for these > assumptions, see my comment at [#120962 > (comment)](https://github.com/llvm/llvm-project/pull/120962#issuecomment-2582864870). > Not sure we should be exposing the current implementation from clang.

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

https://github.com/jdoerfert approved this pull request. LG, one suggestion for the docs. https://github.com/llvm/llvm-project/pull/121789 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commi

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

@@ -2761,6 +2761,47 @@ etc.). Query for this feature with ``__has_builtin(__builtin_assume_separate_storage)``. +``__builtin_assume_dereferenceable`` +- + +``__builtin_assume_dereferenceable`` is used to provide the optimizer with the +kno

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

https://github.com/jdoerfert edited https://github.com/llvm/llvm-project/pull/121789 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

@@ -0,0 +1,36 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s + +// CHECK-LABEL: @test1( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[A_ADDR:%.*]] = alloca ptr,

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

@@ -2761,6 +2761,41 @@ etc.). Query for this feature with ``__has_builtin(__builtin_assume_separate_storage)``. +``__builtin_assume_dereferenceable`` +- + +``__builtin_assume_derefernceable`` is used to provide the optimizer with the +know

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

https://github.com/jdoerfert requested changes to this pull request. https://github.com/llvm/llvm-project/pull/121789 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

@@ -0,0 +1,36 @@ +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -emit-llvm -o - %s | FileCheck %s + +// CHECK-LABEL: @test1( +// CHECK-NEXT: entry: +// CHECK-NEXT:[[A_ADDR:%.*]] = alloca ptr,

[clang] [OpenMP] Allow GPUs to be targeted directly via `-fopenmp`. (PR #122149)

jdoerfert wrote: > I get it, but that doesn't look like the case. If you look at the test case, > the `target` region in `bar` is simply ignored. To me this looks like > treating the entire TU being wrapped into a giant target region instead of > compiling for host. That is a good point. I th

[clang] [OpenMP] Allow GPUs to be targeted directly via `-fopenmp`. (PR #122149)

jdoerfert wrote: > I see it in a different way. `#pragma omp target parallel` (let's just assume > this is valid code) is different from `#pragma omp parallel`, no matter what > target is. However, this patch is to say, when targeting a GPU, `#pragma omp > parallel` **is** `#pragma omp target

[clang] [OpenMP] Allow GPUs to be targeted directly via `-fopenmp`. (PR #122149)

https://github.com/jdoerfert approved this pull request. > We can't expect to have regular OpenMP code working in the same way as OpenMP > offloading code when targeting a GPU meanwhile the code is not wrapped into > target region or declare target The way I see this is: If the target is a GPU

[clang] [llvm] [Clang] Add __builtin_assume_dereferenceable to encode deref assumption. (PR #121789)

@@ -2761,6 +2761,41 @@ etc.). Query for this feature with ``__has_builtin(__builtin_assume_separate_storage)``. +``__builtin_assume_dereferenceable`` +- + +``__builtin_assume_derefernceable`` is used to provide the optimizer with the +know

[clang] [OpenMP] codegen support for masked combined construct parallel masked taskloop (PR #121741)

https://github.com/jdoerfert approved this pull request. Looks like the old master directive implementation. https://github.com/llvm/llvm-project/pull/121741 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

https://github.com/jdoerfert approved this pull request. LG https://github.com/llvm/llvm-project/pull/110179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,191 @@ +//===-- gpuintrin.h - Generic GPU intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

https://github.com/jdoerfert edited https://github.com/llvm/llvm-project/pull/110179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,154 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,184 @@ +//===-- nvptxintrin.h - NVPTX intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,86 @@ +//===-- gpuintrin.h - Generic GPU intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,154 @@ +//===-- nvptxintrin.h - NVPTX intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,154 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,86 @@ +//===-- gpuintrin.h - Generic GPU intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,154 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,86 @@ +//===-- gpuintrin.h - Generic GPU intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,154 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,86 @@ +//===-- gpuintrin.h - Generic GPU intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,154 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

https://github.com/jdoerfert commented: I left many minor comments but nothing blocking. @jhuber6 Were there any conceptual concerns in the thread? https://github.com/llvm/llvm-project/pull/110179 ___ cfe-commits mailing list cfe-commits@lists.llvm.o

[clang] [libc] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

https://github.com/jdoerfert edited https://github.com/llvm/llvm-project/pull/110179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -164,9 +164,57 @@ uint32_t roundToWarpsize(uint32_t s) { uint32_t kmpcMin(uint32_t x, uint32_t y) { return x < y ? x : y; } +static int32_t nvptx_simd_reduce_nowait(void *reduce_data, +ShuffleReductFnTy shflFct, +

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -287,7 +303,7 @@ __kmpc_parallel_51(IdentTy *ident, int32_t, int32_t if_expr, // Set to true for workers participating in the parallel region. uint32_t TId = mapping::getThreadIdInBlock(); - bool ThreadIsActive = TId < state::getEffectivePTeamSize(); + bool ThreadIsAc

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -2974,10 +2974,8 @@ StmtResult Parser::ParseOpenMPDeclarativeOrExecutableDirective( Sema::CompoundScopeRAII Scope(Actions); AssociatedStmt = ParseStatement(); -if (AssociatedStmt.isUsable() && isOpenMPLoopDirective(DKind) && -getLangOpts

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -1210,12 +1211,16 @@ CallInst *CodeExtractor::emitCallAndSwitchStatement(Function *newFunction, if (ArgsInZeroAddressSpace && DL.getAllocaAddrSpace() != 0) { auto *StructSpaceCast = new AddrSpaceCastInst( - Struct, PointerType ::get(Context, 0), "structA

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -470,6 +484,11 @@ class OpenMPIRBuilder { /// all functions are finalized. void finalize(Function *Fn = nullptr); + CallInst *globalizeAlloca(AllocaInst *Alloca, SmallVector&); + void globalizeParallelVars(Function *CurFn); + SmallPtrSet

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -790,8 +794,167 @@ void OpenMPIRBuilder::finalize(Function *Fn) { "OMPIRBuilder finalization \n"; }; - if (!OffloadInfoManager.empty()) + if (!OffloadInfoManager.empty()) createOffloadEntriesAndInfoMetadata(ErrorReportFn); + + if (Config.EmitLLVMUse

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -1033,6 +1033,7 @@ static FieldDecl *addFieldToRecordDecl(ASTContext &C, DeclContext *DC, CGOpenMPRuntime::CGOpenMPRuntime(CodeGenModule &CGM) : CGM(CGM), OMPBuilder(CGM.getModule()) { + jdoerfert wrote: Cleanup the PR please. https://github.com/llvm

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -2824,155 +2829,78 @@ void CGOpenMPRuntimeGPU::emitReduction( return; } - assert((TeamsReduction || ParallelReduction) && - "Invalid reduction selection in emitReduction."); - - llvm::SmallDenseMap VarFieldMap; - llvm::SmallVector PrivatesReductions(Private

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -1402,6 +1402,7 @@ void CodeGenFunction::EmitOMPReductionClauseInit( } const auto *VD = cast(cast(TaskRedRef)->getDecl()); +llvm::dbgs() << "Emitting " << VD->getName() << " " << VD << "\n"; jdoerfert wrote: leftover, same as all the commented out

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -167,6 +167,9 @@ double omp_get_wtick(void); double omp_get_wtime(void); ///} + +int omp_get_simd_lane(void); jdoerfert wrote: ompx_, assuming this is not in the standard. https://github.com/llvm/llvm-project/pull/91261 ___

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -322,6 +322,40 @@ uint32_t mapping::getNumberOfProcessorElements() { return static_cast(config::getHardwareParallelism()); } +uint32_t mapping::getSimdLen() { + return 1; jdoerfert wrote: How does this work if it's always 1? https://github.com/llvm/llv

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -87,8 +87,10 @@ extern "C" { int32_t num_threads, void *fn, void **args, const int64_t nargs) { + //printf("SPMD mode\n")

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -336,13 +337,15 @@ class CheckVarsEscapingDeclContext final return; if (!D->hasAssociatedStmt()) return; + if (const auto *S = dyn_cast_or_null(D->getAssociatedStmt())) { // Do not analyze directives that do not actually require captu

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -105,6 +105,13 @@ uint32_t getMaxTeamThreads(bool IsSPMD); /// Return the number of processing elements on the device. uint32_t getNumberOfProcessorElements(); +uint32_t getSimdLen(); +uint32_t getSimdGroup(); +uint32_t getSimdLane(); +bool isSimdLeader(); +uint32_t getNumS

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

https://github.com/jdoerfert commented: There is too much unrelated stuff, printfs, commented code, etc. too review it properly. I left high-level comments, including why there is a hardcoded simdlen of 1 and globalization for all allocas. https://github.com/llvm/llvm-project/pull/91261 _

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

@@ -184,7 +196,7 @@ __kmpc_parallel_51(IdentTy *ident, int32_t, int32_t if_expr, // set, but they do not have individual ThreadStates yet. If they ever // modify the ICVs beyond this point a ThreadStates will be allocated. - bool IsActiveParallelRegion = NumThreads > 1; +

[clang] [llvm] OpenMP offload 'simd' directive (PR #91261)

https://github.com/jdoerfert edited https://github.com/llvm/llvm-project/pull/91261 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,184 @@ +//===-- nvptxintrin.h - NVPTX intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,184 @@ +//===-- nvptxintrin.h - NVPTX intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

https://github.com/jdoerfert commented: I believe this is useful. Left lots of minor comments. https://github.com/llvm/llvm-project/pull/110179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

jdoerfert wrote: > This way the common intrinsics would be defined in a single location, and it > would be harder for someone to add a new intrinsic without realizing that all > files should implement a common interface. That's one of the reasons mapping.{h,cpp} in DeviceRTL uses the extra lev

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,18 @@ +//===-- gpuintrin.h - Generic GPU intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,184 @@ +//===-- nvptxintrin.h - NVPTX intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

https://github.com/jdoerfert edited https://github.com/llvm/llvm-project/pull/110179 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,184 @@ +//===-- nvptxintrin.h - NVPTX intrinsic functions -===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [Clang] Implement resource directory headers for common GPU intrinsics (PR #110179)

@@ -0,0 +1,187 @@ +//===-- amdgpuintrin.h - AMDPGU intrinsic functions ---===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Ap

[clang] [lld] [llvm] [mlir] [IR] Introduce `T` to `DataLayout` to represent flat address space if a target supports it (PR #108786)

jdoerfert wrote: > IIUC, the query 1) you were referring to was `Type::canLosslesslyBitCastTo`. > If that's the case, it does nothing for AS cast. I don't know what I was thinking of, the above or `CastInst::castIsValid`, neither is very helpful. I am personally not opposed to the DL solution

[clang] [lld] [llvm] [mlir] [IR] Introduce `T` to `DataLayout` to represent flat address space if a target supports it (PR #108786)

jdoerfert wrote: > > +1 to @efriedma-quic and @jdoerfert's comments. DataLayout should remain as > > generic as possible. Trying to encode a concept of "_the_ flat address > > space" in it seems way too specific to one optimization for one or two > > targets. > > This isn't purely a nice to h

[clang] [lld] [llvm] [mlir] [IR] Introduce `T` to `DataLayout` to represent flat address space if a target supports it (PR #108786)

jdoerfert wrote: @efriedma-quic's comment resonates with me. At least all use cases that come to my mind right now are basically questions of the following form: 1) Can I transform a pointer lossless from from AS(A) to AS(B)? 2) Is AS(A) "better"/more specialized than AS(B)? 3) Give me the most

[clang] [llvm] [clang][OpenMP] Prototype #1 of directive splitting (PR #108855)

jdoerfert wrote: How many other (codegen) tests would this affect? https://github.com/llvm/llvm-project/pull/108855 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Offload] Introduce the concept of "default streams" (PR #95371)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/95371 >From 34c8bf739040b9d3d0bf625cdadf12b282249ccf Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Fri, 7 Jun 2024 17:06:02 -0700 Subject: [PATCH 1/2] [Offload][CUDA] Add initial cuda_runtime.h overlay This

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

@@ -393,22 +393,17 @@ struct CUDADeviceTy : public GenericDeviceTy { return Plugin::success(); } - virtual Error callGlobalConstructors(GenericPluginTy &Plugin, - DeviceImageTy &Image) override { -// Check for the presense of gl

[clang] [llvm] [OpenMP] Map `omp_default_mem_alloc` to global memory (PR #104790)

https://github.com/jdoerfert approved this pull request. LG https://github.com/llvm/llvm-project/pull/104790 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/104168 >From 73daf3f9968f07e7f52b6e2ed956773d873634f3 Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 12 Aug 2024 11:53:06 -0700 Subject: [PATCH] [Offload] Provide a kernel library useable by the offload

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/104168 >From bda519493667d3554365061475308da3786bfa9d Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 12 Aug 2024 11:53:06 -0700 Subject: [PATCH] [Offload] Provide a kernel library useable by the offload

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

@@ -1533,6 +1533,55 @@ Error GenericDeviceTy::printInfo() { return Plugin::success(); } +Expected +GenericDeviceTy::getKernel(llvm::StringRef Name, DeviceImageTy *ImagePtr) { + + GenericKernelTy *&KernelPtr = KernelMap[Name]; + if (!KernelPtr) { jdoerfert

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

@@ -0,0 +1,53 @@ +//===-- Kenrels/Memory.cpp - Memory related kernel definitions ===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

@@ -392,25 +392,52 @@ EXTERN void *omp_target_memset(void *Ptr, int ByteVal, size_t NumBytes, DP("filling memory on host via memset"); memset(Ptr, ByteVal, NumBytes); // ignore return value, memset() cannot fail } else { -// TODO: replace the omp_target_memset()

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/104168 >From 9e529ede3a97513ec0afee6c4538e7299d2933f0 Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 12 Aug 2024 11:53:06 -0700 Subject: [PATCH] [Offload] Provide a kernel library useable by the offload

[clang] [llvm] [Offload] Provide a kernel library useable by the offload runtime (PR #104168)

https://github.com/jdoerfert created https://github.com/llvm/llvm-project/pull/104168 As mentioned in #68706, it is useful to be able to call kernels from the runtime, e.g., to perform memset. This patch provides a kernel library that can be invoked from the offload runtime directly and implem

[clang] [Clang] Fix 'nvlink-wrapper' not ignoring `-plugin` like lld does (PR #104056)

https://github.com/jdoerfert approved this pull request. https://github.com/llvm/llvm-project/pull/104056 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

jdoerfert wrote: One buildbot error was unrelated, the others where fixed by making the tests more robust. https://github.com/llvm/llvm-project/pull/94549 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/l

[clang] [llvm] [LinkerWrapper] Always pass `-flto` if the linker supports it (PR #102972)

https://github.com/jdoerfert approved this pull request. LG, but keep the TODOs. https://github.com/llvm/llvm-project/pull/102972 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LinkerWrapper] Always pass `-flto` if the linker supports it (PR #102972)

https://github.com/jdoerfert deleted https://github.com/llvm/llvm-project/pull/102972 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [LinkerWrapper] Always pass `-flto` if the linker supports it (PR #102972)

@@ -21,7 +21,6 @@ // RUN: env LIBOMPTARGET_JIT_PRE_OPT_IR_MODULE=%t.pre.ll \ // RUN: LIBOMPTARGET_JIT_SKIP_OPT=true \ // RUN: %libomptarget-run-generic -// TODO: jdoerfert wrote: Leave the TODOs please. https://github.com/llvm/ll

[clang] [llvm] [LinkerWrapper] Always pass `-flto` if the linker supports it (PR #102972)

@@ -1,4 +1,4 @@ -// RUN: %libomptarget-compile-amdgcn-amd-amdhsa -O1 -mllvm -openmp-opt-inline-device +// RUN: %libomptarget-compile-amdgcn-amd-amdhsa -O2 -mllvm -openmp-opt-inline-device jdoerfert wrote: Why O2 now? https://github.com/llvm/llvm-project/pull/1

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert closed https://github.com/llvm/llvm-project/pull/94549 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/94549 >From e0dca9181683badc5053848a5fe399c371cd81ce Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 3 Jun 2024 19:52:12 -0700 Subject: [PATCH] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload MIME-

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/94549 >From 5f90e77c96348d33e4d4204206288a0164f24092 Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 3 Jun 2024 19:52:12 -0700 Subject: [PATCH] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload MIME-

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/94549 >From a9f228a344d928c2c7a0ffd70605a0665b2b9a07 Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 3 Jun 2024 19:52:12 -0700 Subject: [PATCH] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload MIME-

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/94549 >From af99a3106a886d634eace010295796b3111b99ee Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 3 Jun 2024 19:52:12 -0700 Subject: [PATCH] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload MIME-

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/94549 >From 1a3cf890f27db42684061794b9c95665db54656b Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 3 Jun 2024 19:52:12 -0700 Subject: [PATCH] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload MIME-

[clang] [llvm] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload (PR #94549)

https://github.com/jdoerfert updated https://github.com/llvm/llvm-project/pull/94549 >From 96f25f66fd86831e6039fc6ddf30fa8030595456 Mon Sep 17 00:00:00 2001 From: Johannes Doerfert Date: Mon, 3 Jun 2024 19:52:12 -0700 Subject: [PATCH] [Offload][CUDA] Allow CUDA kernels to use LLVM/Offload MIME-

[clang] [llvm] [LLVM][PassBuilder] Extend the function signature of callback for optimizer pipeline extension point (PR #100953)

jdoerfert wrote: Split it, and maybe add the Phase to the rest as well. One commit to just make it consistent and pass the information along. Second for the AMDGPU stuff. > @jdoerfert Possibly the issue you saw is that this callback just isn't used > by the post-link full LTO pipeline at all?

[clang] [Clang] Fix crash when transforming a `DependentAddressSpaceType` (PR #102206)

jdoerfert wrote: Thanks a lot! https://github.com/llvm/llvm-project/pull/102206 ___ cfe-commits mailing list cfe-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/cfe-commits

[clang] [Clang] Fix crash when transforming a `DependentAddressSpaceType` (PR #102206)

@@ -5838,7 +5839,7 @@ QualType TreeTransform::TransformDependentAddressSpaceType( } else { TypeSourceInfo *DI = getSema().Context.getTrivialTypeSourceInfo( Result, getDerived().getBaseLocation()); -TransformType(TLB, DI->getTypeLoc()); +TLB.TypeWasModifie

[clang] [llvm] [OpenMP] OpenMP 5.1 "assume" directive parsing support (PR #92731)

jdoerfert wrote: This broke the Flang build. You need to add some Flang code for all changes in omp.td. Look for a similar clause in the flang subproject to see what to do, and verify by building Flang. Maybe revert for now until fixed. https://github.com/llvm/llvm-project/pull/92731 _

[clang] [Clang][Sema][OpenMP] Allow `num_teams` to accept multiple expressions (PR #99732)

@@ -11357,8 +11358,13 @@ void OMPClauseReader::VisitOMPAllocateClause(OMPAllocateClause *C) { void OMPClauseReader::VisitOMPNumTeamsClause(OMPNumTeamsClause *C) { VisitOMPClauseWithPreInit(C); - C->setNumTeams(Record.readSubExpr()); C->setLParenLoc(Record.readSourceLoca

[clang] [Clang][Sema][OpenMP] Allow `num_teams` to accept multiple expressions (PR #99732)

@@ -11639,6 +11639,7 @@ def warn_omp_unterminated_declare_target : Warning< InGroup; def err_ompx_bare_no_grid : Error< "'ompx_bare' clauses requires explicit grid size via 'num_teams' and 'thread_limit' clauses">; +def err_omp_multi_expr_not_allowed: Error<"only one expre

  1   2   3   4   5   >