On Fri, Feb 5, 2021 at 12:29 AM Fritz Mueller via cctalk <
cctalk@classiccmp.org> wrote:
>
>
> > On Feb 4, 2021, at 9:45 PM, Josh Dersch wrote:
> > The 11/70 is now somewhat operable. I can examine and deposit memory,
> at least for a short while -- after the system warms up for 30 seconds or
>
> On Feb 4, 2021, at 9:45 PM, Josh Dersch wrote:
> The 11/70 is now somewhat operable. I can examine and deposit memory, at
> least for a short while -- after the system warms up for 30 seconds or so the
> Load Address switch stops functioning.
Nice!!
One handy test on '45 is to put the
On Thu, Feb 4, 2021 at 2:42 PM Fritz Mueller via cctalk <
cctalk@classiccmp.org> wrote:
>
> > On Feb 4, 2021, at 1:51 PM, Josh Dersch wrote:
> > [RC maintenance clock] Yeah, you'd think... but it doesn't work :). I
> mentioned earlier in this thread that it's stuck in single-step mode. From
> t
> On Feb 4, 2021, at 1:51 PM, Josh Dersch wrote:
> [RC maintenance clock] Yeah, you'd think... but it doesn't work :). I
> mentioned earlier in this thread that it's stuck in single-step mode. From
> the schematics it looks like the crystal clock needs to be running to clock
> some of the f
On Thu, Feb 4, 2021 at 10:19 AM Fritz Mueller via cctalk <
cctalk@classiccmp.org> wrote:
>
>
> > On Feb 3, 2021, at 8:07 PM, Josh Dersch wrote:
> > Sure enough, TIGB XTAL H was a flat line. Nothing happening at the
> crystal itself either. The crystal's casing was fairly corroded (which is
> in
> On Feb 3, 2021, at 8:07 PM, Josh Dersch wrote:
> Sure enough, TIGB XTAL H was a flat line. Nothing happening at the crystal
> itself either. The crystal's casing was fairly corroded (which is
> interesting, since nothing else on the board is) and after a tiny bit of
> prodding one of the
On Tue, Feb 2, 2021 at 12:30 AM Josh Dersch wrote:
>
>
> On Sun, Jan 31, 2021 at 10:03 PM Fritz Mueller wrote:
>
>>
>>
>> > On Jan 31, 2021, at 8:19 PM, Josh Dersch wrote:
>> > Well, what's interesting here is that on my system, switch S4 (MAINT
>> STPR) steps the processor with switches S1 and
On Sun, Jan 31, 2021 at 10:03 PM Fritz Mueller wrote:
>
>
> > On Jan 31, 2021, at 8:19 PM, Josh Dersch wrote:
> > Well, what's interesting here is that on my system, switch S4 (MAINT
> STPR) steps the processor with switches S1 and S2 set to *any*
> configuration.
>
> Hmm, would expect to see S2
> On Jan 31, 2021, at 8:19 PM, Josh Dersch wrote:
> Well, what's interesting here is that on my system, switch S4 (MAINT STPR)
> steps the processor with switches S1 and S2 set to *any* configuration.
Hmm, would expect to see S2:1 S1:0 step by microinstruction, and S2:1 S1:1 step
by clock ph
On Sun, Jan 31, 2021 at 7:55 PM Josh Dersch wrote:
> On Sun, Jan 31, 2021 at 7:04 PM Fritz Mueller via cctalk <
> cctalk@classiccmp.org> wrote:
>
>> > Yeah. I want to get the fans installed and then go triple-check all
>> the power signals and get the voltages dialed in nicely. But then things
On Sun, Jan 31, 2021 at 7:04 PM Fritz Mueller via cctalk <
cctalk@classiccmp.org> wrote:
> > Yeah. I want to get the fans installed and then go triple-check all the
> power signals and get the voltages dialed in nicely. But then things come
> out on extenders :).
>
> Yup -- I'm surprised how pic
> Yeah. I want to get the fans installed and then go triple-check all the
> power signals and get the voltages dialed in nicely. But then things come
> out on extenders :).
Yup -- I'm surprised how picky my '45 is about +5 undervolt; it really seems
happiest with trimmed up to about 5.1 at th
On Sun, Jan 31, 2021 at 5:05 PM Fritz Mueller via cctalk <
cctalk@classiccmp.org> wrote:
> Hi Josh,
>
> ZAP is effectively reset for the micro-architecture, forcing the ucode
> address to known/initial value. It has multiple sources throughout the
> processor, including tendrils into some of trap
Hi Josh,
ZAP is effectively reset for the micro-architecture, forcing the ucode address
to known/initial value. It has multiple sources throughout the processor,
including tendrils into some of trap handling hardware. (Caveat: my experience
is based off extensive work with the '11/45, but the
On Sun, Jan 31, 2021 at 2:39 PM Guy Sotomayor via cctalk <
cctalk@classiccmp.org> wrote:
> Did you check to make sure that power is wired correctly to the
> PEP-70/Hypercache? They are typically installed in "empty" slots and
> don't have power (or anything else) routed to them. They require som
Did you check to make sure that power is wired correctly to the
PEP-70/Hypercache? They are typically installed in "empty" slots and
don't have power (or anything else) routed to them. They require some
additional jumpers to be installed on the backplane so that they get power.
On 1/31/21 2
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