On Fri, Apr 19, 2019 at 5:46 AM Noel Chiappa via cctalk <
cctalk@classiccmp.org> wrote:
> where the description of the invention of 3-wire core can be found on pg.
> 231; it was invented by a group of engineers, based on a similar idea used
> in
> Stretch. There is indeed a patent, No. 3,381,282,
I'll be curious to hear what you end up getting. I've also meant to acquire one
over the years just for historical education and display sake. One thing to
keep in mind, but I'm sure you're aware is the physical size. Often they're
quite small. However I think eBay sellers recent years have been
> On Apr 18, 2019, at 11:18 PM, dwight via cctalk wrote:
>
> Although, after written, there is little magnetism lost out side of the ring,
> while being magnetized, there is quite a bit of stray magnetism. By placing
> the the rings at 90 degrees, it minimizes the magnetism induced in the
> ad
> On Apr 18, 2019, at 9:01 PM, Anders Nelson wrote:
>
> I believe I read they weaved the planes this way to minimize crosstalk, EMI
> or heat.
>
> =]
The zigzag routing, you mean? Yes, that's to minimize crosstalk. It's nicely
described in a training manual for the Electrologica X1. The
> From: Curious Marc
> I believe 3 wire memory was first introduced by IBM in their 360
> systems ... They would almost certainly have patented their way to do it
Correct (and your knowledge and memory is good)! Motivated by this clue, I
looked in:
Emerson W. Pugh, "Memories
, "cctalk@classiccmp.org"
Date: Thursday, April 18, 2019 at 7:08 PM
To: Noel Chiappa , ,
"cctalk@classiccmp.org"
Subject: Re: Plane of core memory
On 04/18/2019 03:15 PM, Noel Chiappa via cctalk wrote:
> From: Jon Elson
> As soon as somebody fi
From: cctalk on behalf of Anders Nelson via
cctalk
Sent: Thursday, April 18, 2019 6:01 PM
To: paulkon...@comcast.net; General Discussion: On-Topic and Off-Topic Posts
Subject: Re: Plane of core memory
I believe I read they weaved the planes this way to minimize crosstalk, EMI
or heat
On 04/18/2019 03:15 PM, Noel Chiappa via cctalk wrote:
> From: Jon Elson
> As soon as somebody figured out that you could combine the sense and
> inhibit wires, everybody immediately went to 3-wire planes.
I"m suprised the idea wasn't patented. Or maybe it was, and they made the
I believe I read they weaved the planes this way to minimize crosstalk, EMI
or heat.
=]
On Thu, Apr 18, 2019, 1:13 PM Paul Koning via cctalk
wrote:
>
>
> > On Apr 18, 2019, at 11:47 AM, Jon Elson via cctalk <
> cctalk@classiccmp.org> wrote:
> >
> > On 04/18/2019 04:49 AM, Brent Hilpert via ccta
>Stewart-Warner (I think) vector graphics terminals
> from the 1960s. Check Ebay in a week or three...
Correction: Hazeltine.
--
Will
> -Original Message-
> From: cctalk On Behalf Of Chuck Guzis via
> cctalk
> Sent: 18 April 2019 17:30
> To: Jim Manley via cctalk
> Subject: Re: Plane of core memory
>
> On 4/18/19 9:02 AM, Jim Manley via cctalk wrote:
> > Jussi Kilpelainen&
> From: Jon Elson
> As soon as somebody figured out that you could combine the sense and
> inhibit wires, everybody immediately went to 3-wire planes.
I"m suprised the idea wasn't patented. Or maybe it was, and they made the
license widely available at modest terms?
Noel
On 2019-Apr-18, at 9:30 AM, Chuck Guzis via cctalk wrote:
> On 4/18/19 9:02 AM, Jim Manley via cctalk wrote:
>> Jussi Kilpelainen's page cited above (
>> https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/)
>> refers to the work of Ben North and Oliver Nash to create another co
On 2019-Apr-18, at 8:47 AM, Jon Elson wrote:
> On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote:
>> It's a 4-wire 3D planar array. By topology and construction I would guess it
>> date it from the 60s.
> Make that EARLY '60s. As soon as somebody figured out that you could combine
> the sen
> * Is there a way to "read" the core non destructively using any kind
> of passive method (I know, it would be tedious, no doubt, but I just
> feel like I should "backup" the core before I go messing with it)?
I'm having trouble figuring out what typical magnetic field strengths on
t
On 4/18/19 10:33 AM, dwight via cctalk wrote:
> I don't believe there is a simple non-destructive way to read the state.
https://patents.google.com/patent/US3924248
ce knowing the levels used, the entire array can be read.
Dwight
From: cctalk on behalf of Jim Brain via cctalk
Sent: Thursday, April 18, 2019 10:19 AM
To: cctalk@classiccmp.org
Subject: Re: Plane of core memory
I am the enviable owners of a plane of memory (proc
> Or still do a fluid one, but take Turing's suggestion
> and use gin as the medium.
Better use some good error correction.
--
Will
> (Sorry, not currently interested in selling :-)
Well, I am. And I have a LOT of 8K core system modules (planes and
drivers) from old Stewart-Warner (I think) vector graphics terminals
from the 1960s. Check Ebay in a week or three...
--
Will
> I don't expect that any EBAM has survived--I think all of the stuff I
> saw at CDC ADL was scrapped. Seems that the technology is all but
> forgotten today:
>
> https://bit.ly/2KOOl82
How was the CDC EBAM different from the other memory tubes, like the Radechon?
--
Will
My mention of electron-beam memory devices left off GE's BEAMOS and
RCA's Selectron.
WikiPedia has a nice article on the Selectron, but BEAMOS took a bit of
looking:
http://rcaselectron.com/GEBEAMOS.html
Too bad that neither RCA nor GE were in the computer business in 1978.
--Chuck
I am the enviable owners of a plane of memory (procured a few years back
at VCF-East, when there were a bunch of 32K? boards int he consignment pile.
(Sorry, not currently interested in selling :-)
But, I am thankful for the links, as I have wanted to interface this
with a CPU or PC of some ki
On Thu, 4/18/19, dwight via cctalk wrote:
> My understanding was that the mercury delay lines
> needed periodic repairs ( not sure what the cause
> was but mercury does dissolve into many metals ).
> If I were going to make a delay line memory, I'd go with
> the magnetostrictive. These are practic
> On Apr 18, 2019, at 11:47 AM, Jon Elson via cctalk
> wrote:
>
> On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote:
>> It's a 4-wire 3D planar array. By topology and construction I would guess it
>> date it from the 60s.
> Make that EARLY '60s. As soon as somebody figured out that you
On 4/18/19 9:42 AM, Al Kossow via cctalk wrote:
>
> The 1401 guys at CHM were working on one using a real 701 tube.
> I don't think it was ever finished.
I don't expect that any EBAM has survived--I think all of the stuff I
saw at CDC ADL was scrapped. Seems that the technology is all but
forgot
On 4/18/19 2:08 AM, Andrew Luke Nesbit wrote:
This is great and I will look into this.
I'm generally not into SBCs. (I do more with virtualization than have
SBCs proliferate.) But the idea of having core memory, and it working,
is quite appealing to me.
But my original request was for so
y and a spool of piano wire.
Dwight
From: cctalk on behalf of Al Kossow via cctalk
Sent: Thursday, April 18, 2019 9:42 AM
To: cctalk@classiccmp.org
Subject: Re: Plane of core memory
On 4/18/19 9:30 AM, Chuck Guzis via cctalk wrote:
> Anyone with a Willi
Not any dec core memory stack board I know of, - fingers are not gold
plated. - it is 8 bit.
I could speculate it might be from a low cost system from the late 70s
or early 80s but
in that time, everything core was in the many thousands of dollars.
On Thu, Apr 18, 2019 at 12:30 PM Chuck Guzis via
On 4/18/19 9:30 AM, Chuck Guzis via cctalk wrote:
> Anyone with a Williams tube project?
The 1401 guys at CHM were working on one using a real 701 tube.
I don't think it was ever finished.
@tubetimeus built a small core array with Bulgarian cores
https://twitter.com/TubeTimeUS/status/10534244
On 4/18/19 9:02 AM, Jim Manley via cctalk wrote:
> Jussi Kilpelainen's page cited above (
> https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/)
> refers to the work of Ben North and Oliver Nash to create another core
> memory shield for Arduino Unos. Their site inspired Jussi
Jussi Kilpelainen's page cited above (
https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/)
refers to the work of Ben North and Oliver Nash to create another core
memory shield for Arduino Unos. Their site inspired Jussi to create his
shield kit, which can be viewed at:
http:
On 04/18/2019 04:49 AM, Brent Hilpert via cctalk wrote:
It's a 4-wire 3D planar array. By topology and
construction I would guess it date it from the 60s.
Make that EARLY '60s. As soon as somebody figured out that
you could combine the sense and inhibit wires, everybody
immediately went to 3-w
> > > Does anybody here have any ideas? For example, what is it? Or, if you
> > > don't know, could you point me in the right direction so I can do the
> > > research myself? Thanks!!
> > I have no idea.
> >
> > The connectors remind me of a DEC machine bus, but I don't know what the
> > bus
On 2019-Apr-17, at 9:47 PM, Grant Taylor via cctalk wrote:
> On 4/17/19 10:30 PM, Andrew Luke Nesbit via cctalk wrote:
>> Hello all,
>
> Hi,
>
>> I have been wanting to acquire a plane of magnetic core memory as a piece of
>> computing history. My partner actually thinks they look very beautifu
On 18/04/2019 05:47, Grant Taylor via cctalk wrote:
> If you just want core memory, check out the following link:
>
> Link - Core Memory Shield for Arduino
> - https://www.tindie.com/products/kilpelaj/core-memory-shield-for-arduino/
>
> You can actually use Core Memory on a modern computer. }:-
On 4/17/19 10:30 PM, Andrew Luke Nesbit via cctalk wrote:
Hello all,
Hi,
I have been wanting to acquire a plane of magnetic core memory as a
piece of computing history. My partner actually thinks they look very
beautiful and says we should frame it, if we ever find a plane.
If you just wa
Hello all,
I have been wanting to acquire a plane of magnetic core memory as a
piece of computing history. My partner actually thinks they look very
beautiful and says we should frame it, if we ever find a plane.
At the time I was thinking about memory from the S/360. But in
retrospect, this is
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