Re: [PATCH] hwclock: Support GNU Hurd

2024-12-09 Thread Karel Zak
On Mon, Dec 09, 2024 at 11:36:22AM GMT, Samuel Thibault wrote: > Karel Zak, le lun. 09 déc. 2024 11:32:33 +0100, a ecrit: > > On Mon, Dec 09, 2024 at 10:58:15AM GMT, Zhaoming Luo wrote: > > > if (ctl->rtc_dev_name) { > > > rtc_dev_name = ctl->rtc_dev_name; > > > - rtc_dev_fd = o

[PATCH v2] hwclock: Support GNU Hurd

2024-12-09 Thread Zhaoming Luo
* configure.ac: add HURD so it can be used in conditional in am files * sys-utils/Makemodule.am: compile hwclock for GNU Hurd * sys-utils/hwclock-rtc.c: compile for GNU Hurd * sys-utils/hwclock.c: compile for GNU Hurd * sys-utils/hwclock.h: compile for GNU Hurd Signed-off-by: Zhaoming Luo --- co

Re: [PATCH v2] hwclock: Support GNU Hurd

2024-12-09 Thread Karel Zak
On Mon, Dec 09, 2024 at 07:16:11PM GMT, Zhaoming Luo wrote: > configure.ac| 6 +- > sys-utils/Makemodule.am | 5 + > sys-utils/hwclock-rtc.c | 19 ++- > sys-utils/hwclock.c | 2 +- > sys-utils/hwclock.h | 4 +++- > 5 files changed, 32 insertions(+),

[PATCH 6/6 gnumach] i386/apic: Fix condition on non-BSP

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
The condition was intended for non-BSP processors to disable timer, but apic_id != 0 means it could affect BSP if its apic id is non-zero. Fixes this bug. --- i386/i386/apic.c | 5 + 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/i386/i386/apic.c b/i386/i386/apic.c index 41b335

[PATCH 2/6 gnumach] i386/cpuboot: Dont use CPU_NUMBER_NO_STACK() early

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Since we just set up the gs segment, we can use CPU_NUMBER instead of CPU_NUMBER_NO_STACK. --- i386/i386/cpuboot.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/i386/i386/cpuboot.S b/i386/i386/cpuboot.S index 9ac86845..09855864 100644 --- a/i386/i386/cpuboot.S +++ b/i386/i386

[PATCH 5/6 gnumach] smp: Use logical destination not physical apic id

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Since modern x86 cpus only support 4 bits of destination field in ICR, we could only address up to 16 processors, assuming their physical APIC ID was < 0x10. Some processors eg AMD fam15h have physical apic ids starting at 0x10 but only support 4 bits. So these lapics are unaddressable using physi

Re: [PATCH Web] Add an introduction about a mig-mutate.h file

2024-12-09 Thread Zhaoming Luo
On 12/8/24 9:26 PM, jbra...@dismail.de wrote: December 7, 2024 at 7:11 PM, "Zhaoming Luo" mailto:zhming...@163.com?to=%22Zhaoming%20Luo%22%20%3Czhmingluo%40163.com%3E > wrote: Add a link pointing to an introduction about a mig-mutate.h file I do think this is a good contribution to the wik

[PATCH 4/6 gnumach] pmap: Separate temporary_mapping from set_page_dir

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Prepare for smp parallel init where we want to call these two functions on different cpus at different times. --- i386/i386/mp_desc.c | 1 + i386/i386at/model_dep.c | 1 + i386/intel/pmap.c | 2 -- 3 files changed, 2 insertions(+), 2 deletions(-) diff --git a/i386/i386/mp_desc.c b/i386

[PATCH 1/6 gnumach] i386/cpuboot: Simplify for legibility

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
The current segmentation already adds -KERNELBASE. But only when accessing the memory. Don't forget to reload gdt. --- i386/i386/cpuboot.S | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/i386/i386/cpuboot.S b/i386/i386/cpuboot.S index 7e6c4770..9ac86845 100644 --- a

[PATCH 3/6 gnumach] i386/cpuboot: Write gs selector correctly

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
To make selectors work reliably, we need to write zero to it before writing its final value. --- i386/i386/cpuboot.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/i386/i386/cpuboot.S b/i386/i386/cpuboot.S index 09855864..f549a2bc 100644 --- a/i386/i386/cpuboot.S +++ b/i386/i386/cpuboot.S @

[PATCH 0/6 gnumach] Preparation for parallel SMP init

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Hi, This patchset consists of 6 patches that have been tested **not** to break both smp and non-smp systems, but get us closer to having smp working fully. The rationale for going with parallel init for smp is that APICs are not individually addressible for more than 8 cpus (in logical mode) or

Re: [PATCH] hwclock: Support GNU Hurd

2024-12-09 Thread Karel Zak
On Mon, Dec 09, 2024 at 10:58:15AM GMT, Zhaoming Luo wrote: > if (ctl->rtc_dev_name) { > rtc_dev_name = ctl->rtc_dev_name; > - rtc_dev_fd = open(rtc_dev_name, O_RDONLY); > + rtc_dev_fd = open(rtc_dev_name, O_RDWR); Why do you need O_RDWR on HURD? Maybe i

Re: [PATCH] hwclock: Support GNU Hurd

2024-12-09 Thread Samuel Thibault
Karel Zak, le lun. 09 déc. 2024 11:32:33 +0100, a ecrit: > On Mon, Dec 09, 2024 at 10:58:15AM GMT, Zhaoming Luo wrote: > > if (ctl->rtc_dev_name) { > > rtc_dev_name = ctl->rtc_dev_name; > > - rtc_dev_fd = open(rtc_dev_name, O_RDONLY); > > + rtc_dev_fd = open(rtc_

Re: [PATCH 1/6 gnumach] i386/cpuboot: Simplify for legibility

2024-12-09 Thread Samuel Thibault
Damien Zammit via Bug reports for the GNU Hurd, le lun. 09 déc. 2024 12:17:23 +, a ecrit: > The current segmentation already adds -KERNELBASE. > But only when accessing the memory. I have applied this part, thanks! > Don't forget to reload gdt. > > --- > i386/i386/cpuboot.S | 10 --

Re: [PATCH 2/6 gnumach] i386/cpuboot: Dont use CPU_NUMBER_NO_STACK() early

2024-12-09 Thread Samuel Thibault
Applied, thanks! Damien Zammit via Bug reports for the GNU Hurd, le lun. 09 déc. 2024 12:17:30 +, a ecrit: > Since we just set up the gs segment, we can use > CPU_NUMBER instead of CPU_NUMBER_NO_STACK. > --- > i386/i386/cpuboot.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > d

Re: [PATCH 6/6 gnumach] i386/apic: Fix condition on non-BSP

2024-12-09 Thread Samuel Thibault
Applied, thanks! Damien Zammit via Bug reports for the GNU Hurd, le lun. 09 déc. 2024 12:18:02 +, a ecrit: > The condition was intended for non-BSP processors to > disable timer, but apic_id != 0 means it could affect BSP > if its apic id is non-zero. Fixes this bug. > > --- > i386/i386/ap

Re: [PATCH 5/6 gnumach] smp: Use logical destination not physical apic id

2024-12-09 Thread Samuel Thibault
Applied, thanks! Damien Zammit via Bug reports for the GNU Hurd, le lun. 09 déc. 2024 12:17:53 +, a ecrit: > Since modern x86 cpus only support 4 bits of destination field > in ICR, we could only address up to 16 processors, assuming > their physical APIC ID was < 0x10. Some processors eg AM

Re: [PATCH 3/6 gnumach] i386/cpuboot: Write gs selector correctly

2024-12-09 Thread Samuel Thibault
Damien Zammit via Bug reports for the GNU Hurd, le lun. 09 déc. 2024 12:17:37 +, a ecrit: > To make selectors work reliably, we need to > write zero to it before writing its final value. $PERCPU_DS is different from $KERNEL_DS, so we don't need to switch through 0. > --- > i386/i386/cpuboot

Re: [PATCH 4/6 gnumach] pmap: Separate temporary_mapping from set_page_dir

2024-12-09 Thread Samuel Thibault
Applied, thanks! Damien Zammit via Bug reports for the GNU Hurd, le lun. 09 déc. 2024 12:17:45 +, a ecrit: > Prepare for smp parallel init where we want to call these > two functions on different cpus at different times. > > --- > i386/i386/mp_desc.c | 1 + > i386/i386at/model_dep.c | 1

[PATCH 1/5 gnumach] i386/apic: Fix logical id numbering

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
The number is actually a mask bit per cpu. --- i386/i386/apic.c | 2 +- i386/i386/apic.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/i386/i386/apic.c b/i386/i386/apic.c index 7ec8c49b..e0941c6a 100644 --- a/i386/i386/apic.c +++ b/i386/i386/apic.c @@ -337,7 +337,7 @@ lapi

[PATCH 2/5 gnumach] smp: Remove early GS access

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Since the gdt for apboot is located at a shared location in memory, we cannot patch the gdt values per cpu during parallel smp init, or havoc entails. --- i386/i386/cpuboot.S | 75 + i386/i386/mp_desc.c | 6 ++-- 2 files changed, 11 insertions(+), 70 de

[PATCH 0/5 gnumach] smp: Parallel SMP init

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Hi, I figured out what was broken in my previous attempt at this: The APs were calling splhigh() in the debug printing code, which caused an unnecessary GS segment access. This should now support all x86 cpus with any core counts. Every 8 processors are grouped into the same IPI group, so on oc

[PATCH 5/5 gnumach] smp: Parallel SMP init

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
Now that things are in place, we switch to parallel init. The key to this change is that the INIT/STARTUP sequence is done in one step, and all cpus wake up at the same time. Synchronisation is done to complete each cpu setup individually. --- i386/i386/mp_desc.c | 51 +++--

[PATCH 3/5 gnumach] smp: Delay setting spl_init flag until after smp bringup

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
If this is not done, the spl code is called by kmsg_putchar on APs during printing of bringup debug, causing the only unnecessary early access of GS. --- i386/i386/mp_desc.c | 3 ++- i386/i386at/model_dep.c | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/i386/i386/mp_de

[PATCH 4/5 gnumach] smp: Make sure BSP is cpu 0 when starting other cpus

2024-12-09 Thread Damien Zammit via Bug reports for the GNU Hurd
This is basically a no-op but ensures we are doing smp bringup correctly. --- i386/i386/mp_desc.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/i386/i386/mp_desc.c b/i386/i386/mp_desc.c index 7595eb1e..295fccc7 100644 --- a/i386/i386/mp_desc.c +++ b/i386/i386/mp_desc.c @@