Re: H5 (orange pi pc2) stability

2020-11-05 Thread adr
Testing other frequencies I noticed that I made a mistake. The value set by u-boot in "PLL_DDR Control Register" is 1344MHz: => md 0x01C20020 1 01c20020: 90001b10 The "DRAM configuration register" has CLK_SRC_SEL set to PLL_DDR and the divider M set to 1 (DRAM_DIV_M = 0): => md 0x01C202F4 1 01c

H5 (orange pi pc2) stability

2020-11-04 Thread adr
Hello, I found the problem with this board: the DDR frequency. U-boot is setting it to 648MHz and somehow it is creating instability. I reduced it to 576MHz and all the problems are gone. I added an opp table to the dtb and I've tested the board at maximum freq, playing online videos in chromium (