Hello, I found the problem with this board: the DDR frequency. U-boot is setting it to 648MHz and somehow it is creating instability. I reduced it to 576MHz and all the problems are gone. I added an opp table to the dtb and I've tested the board at maximum freq, playing online videos in chromium (iridium) to stress the cpu and the network, while installing and deleting packages. All the panics that I suffered and other user reported here:
https://marc.info/?t=154891874100002&r=1&w=2 are gone. Users of other H5 boards -and maybe different ram chips, can test if these problems are related to the soc, not just to the board. This is the diff of the dts after decompiling the ports' dtb: ============================================================ --- sun50i-h5-orangepi-pc2.dts.orig Tue Nov 3 22:05:33 2020 +++ sun50i-h5-orangepi-pc2.dts Tue Nov 3 23:05:33 2020 @@ -980,6 +980,10 @@ device_type = "cpu"; reg = <0x00>; enable-method = "psci"; + clocks = <0x03 0x0e>; + clock-latency-ns = <0x3b9b0>; + #cooling-cells = <0x02>; + operating-points-v2 = <0x40>; cpu-supply = <0x2a>; phandle = <0x2b>; }; @@ -989,6 +993,10 @@ device_type = "cpu"; reg = <0x01>; enable-method = "psci"; + clocks = <0x03 0x0e>; + clock-latency-ns = <0x3b9b0>; + #cooling-cells = <0x02>; + operating-points-v2 = <0x40>; phandle = <0x2c>; }; @@ -997,6 +1005,10 @@ device_type = "cpu"; reg = <0x02>; enable-method = "psci"; + clocks = <0x03 0x0e>; + clock-latency-ns = <0x3b9b0>; + #cooling-cells = <0x02>; + operating-points-v2 = <0x40>; phandle = <0x2d>; }; @@ -1005,6 +1017,10 @@ device_type = "cpu"; reg = <0x03>; enable-method = "psci"; + clocks = <0x03 0x0e>; + clock-latency-ns = <0x3b9b0>; + #cooling-cells = <0x02>; + operating-points-v2 = <0x40>; phandle = <0x2e>; }; }; @@ -1037,6 +1053,66 @@ polling-delay-passive = <0x00>; polling-delay = <0x00>; thermal-sensors = <0x2f 0x01>; + }; + }; + + cpu-opp-table { + compatible = "operating-points-v2"; + opp-shared; + phandle = <0x40>; + + opp-480000000 { + opp-hz = <0x00 0x1c9c3800>; + opp-microvolt = <0xfde80 0xfde80 0x13d620>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-648000000 { + opp-hz = <0x00 0x269fb200>; + opp-microvolt = <0xfde80 0xfde80 0x13d620>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-816000000 { + opp-hz = <0x00 0x30a32c00>; + opp-microvolt = <0x10c8e0 0x10c8e0 0x13d620>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-960000000 { + opp-hz = <0x00 0x39387000>; + opp-microvolt = <0x124f80 0x124f80 0x13d620>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1008000000 { + opp-hz = <0x00 0x3c14dc00>; + opp-microvolt = <0x124f80 0x124f80 0x13d620>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1104000000 { + opp-hz = <0x00 0x41cdb400>; + opp-microvolt = <0x142440 0x142440 0x142440>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1200000000 { + opp-hz = <0x00 0x47868c00>; + opp-microvolt = <0x142440 0x142440 0x142440>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1296000000 { + opp-hz = <0x00 0x4d3f6400>; + opp-microvolt = <0x147260 0x147260 0x147260>; + clock-latency-ns = <0x3b9b0>; + }; + + opp-1368000000 { + opp-hz = <0x00 0x518a0600>; + opp-microvolt = <0x155cc0 0x155cc0 0x155cc0>; + clock-latency-ns = <0x3b9b0>; }; }; ============================================================ This is the boot.cmd I'm using to set the frequency, I added some comments so people can experiment easily: ============================================================ # PLL_DDR Output= (24MHz*N*K)/M # Bits to set: # 31 | PLL_ENABLE. # 20 | Update, must be set when changing the PLL. # 12:8 | N. # 5:4 | K. # 1:0 | M. echo Setting DDR3 freq to 576MHz mw 0x01C20020 0x80101810 load mmc 0:1 ${fdt_addr_r} ${fdtfile} load mmc 0:1 ${kernel_addr_r} efi/boot/bootaa64.efi bootefi ${kernel_addr_r} ${fdt_addr_r} ============================================================ When I have time I will propose a patch to the dtb port, and try to make a u-boot-tools package to include mkimage. The u-boot port could be patched to change the DDR frequency on this board. I will experiment with other frequencies, this Samsung chip should work ok at 933MHz for 1866Mb/sec/pin. Regards, adr.
