Hello,
I'm going nuts trying to find out why h5 is unstable... but that's
another story. The case is that studying the code it seems to me that
it would be more consistent to add H3_CLK_PLL_CPUX to sun8i_h3_gates[]
and use sxiccmu_ccu_enable (or even SXICLR4(sc, sun8i_h3_gates[idx].reg,
(1U << sun
> > reg |= H3_CPUX_CLK_SRC_SEL_OSC24M;
> > SXIWRITE4(sc, H3_CPUX_AXI_CFG_REG, reg);
> > + /* Must wait at least 8 cycles of the current clock. */
> > + delay(1);
> >
> > error = sxiccmu_h3_set_frequency(sc, H3_CLK_PLL_CPUX, freq);
> >
> >
> Date: Wed, 26 Aug 2020 21:54:30 +
> From: a...@sdf.org
>
> > > reg |= H3_CPUX_CLK_SRC_SEL_OSC24M;
> > > SXIWRITE4(sc, H3_CPUX_AXI_CFG_REG, reg);
> > > + /* Must wait at least 8 cycles of the current clock. */
> > > + delay(1);
> > >
> > > error
> Date: Tue, 25 Aug 2020 18:36:03 +0900
> From: SASANO Takayoshi
>
> Hi,
>
> I thought to avoid false-LOCKed situation but I didn't consider
> about false-unLOCKed. So same as adr says, it is the best solution
> to wait simply with delay(PLL_STABLE_TIME_REG1 usec). No need to refer
> LOCK flag.
Hi,
I thought to avoid false-LOCKed situation but I didn't consider
about false-unLOCKed. So same as adr says, it is the best solution
to wait simply with delay(PLL_STABLE_TIME_REG1 usec). No need to refer
LOCK flag.
Here is renewed diff. I also tested on Banana Pi BPI-P2 (Allwinner H2+).
This di
Hi,
> I thought LOCK flag is set regardless PLL is locked or not, simply
> time passed... but your comment tells the flag reflects PLL status
> but unstable.
And you are right!, that's what happens with these documents...
The PLL_CPUX_CTRL_REG description says that the lock bit "indicates
that t
Hello, sorry for late reply.
> It seems that the PLL is not been stabilized although LOCK is read as
> set. You can check it by putting a delay in sxiccmu_h3_set_frequency
> after H3_PLL_CPUX_LOCK is tested, delay(200) is sufficient, the machine
> will boot ok.
My OrangePi PC took 257usec to LOCK
> Hi,
>
> Previously I found OpenBSD-6.6, 6.7 and -current did not work on
> my Orange Pi PC (Allwinner H3).
>
> For these days I was looking for what caused this problem, and
> finally I found the M field of H3_PLL_CPUX_CTRL_REG (@0x01c2)
> made thing worse.
>
> This, M value should be 2. I
Hi,
Previously I found OpenBSD-6.6, 6.7 and -current did not work on
my Orange Pi PC (Allwinner H3).
For these days I was looking for what caused this problem, and
finally I found the M field of H3_PLL_CPUX_CTRL_REG (@0x01c2)
made thing worse.
This, M value should be 2. If this is 1, system
