to invoke flush_delayed_work before
cancel_delayed_work_sync. Just put cancel at first
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gpu/drm/
7.0: [drm:amdgpu_ib_ring_tests [amdgpu]] *ERROR* IB test failed
on vce0 (-110).
[drm:amdgpu_device_delayed_init_work_handler [amdgpu]] *ERROR* ib ring test
failed (-110).
v2: replace cancel_delayed_work_sync() with flush_delayed_work()
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amd
ce_driver_attach+0x58/0x60
[ 26.205709] __driver_attach+0xc3/0x140
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 3 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 16
2 files changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/
VF and PF to handle powerplay will be removed and VF
will use new the registers below to handshake with SMU.
mmMP1_SMN_C2PMSG_101: register to handle SMU message
mmMP1_SMN_C2PMSG_102: register to handle SMU parameter
mmMP1_SMN_C2PMSG_103: register to handle SMU response
Signed-off-by: Yintian Tao
pp_one_vf
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 13 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 -
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 121 +++---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 51 --
drivers/gpu/drm
pp_one_vf
v3: separte one fix into another patch and fix the parens
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 13 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 -
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 118 ++---
drivers/gpu/drm/amd
because some asics have no smu.ppt_funcs
we need add one check for it otherwise
it will raise null pointer problem.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
pp_one_vf
v3: fix the parens
v4: forbid vf to change smu feature
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 16 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 -
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c| 235 +-
drivers/gpu/drm/amd
pp_one_vf
v3: fix the parens
v4: forbid vf to change smu feature
v5: use hwmon_attributes_visible to skip sepicified hwmon atrribute
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 16 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c | 4 -
drivers/gpu/drm/amd
pp_one_vf
v3: fix the parens
v4: forbid vf to change smu feature
v5: use hwmon_attributes_visible to skip sepicified hwmon atrribute
v6: change skip condition at vega10_copy_table_to_smc
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c| 16 +-
drivers/gpu/drm/amd
Under sriov pp one vf mode, there is no need to set
soc clk under pp one vf because smu firmware will depend
on the mclk to set the appropriate soc clk for it.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion
Originally, only the PTE valid is taken in consider.
The PRT case is missied when bo update which raise problem.
We need add condition for PRT case.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a
Originally, only the PTE valid is taken in consider.
The PRT case is missied when bo update which raise problem.
We need add condition for PRT case.
v2: add PRT condition for amdgpu_vm_bo_update_mapping, too
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 6 +++---
1
Originally, only the PTE valid is taken in consider.
The PRT case is missied when bo update which raise problem.
We need add condition for PRT case.
v2: add PRT condition for amdgpu_vm_bo_update_mapping, too
v3: fix one typo error
Signed-off-by: Yintian Tao
Reviewed-by: Christian König
29/0x50
[ 732.943457] amdgpu_fence_process+0x99/0x120 [amdgpu]
[ 732.944393] sdma_v4_0_process_trap_irq+0x81/0xa0 [amdgpu]
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 19 ++-
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 2 ++
drivers/gpu/drm/amd
92] dma_fence_signal+0x29/0x50
[ 732.943457] amdgpu_fence_process+0x99/0x120 [amdgpu]
[ 732.944393] sdma_v4_0_process_trap_irq+0x81/0xa0 [amdgpu]
v2: hold the finished fence at drm_sched_process_job instead of
amdgpu_fence_process
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdg
92] dma_fence_signal+0x29/0x50
[ 732.943457] amdgpu_fence_process+0x99/0x120 [amdgpu]
[ 732.944393] sdma_v4_0_process_trap_irq+0x81/0xa0 [amdgpu]
v2: hold the finished fence at drm_sched_process_job instead of
amdgpu_fence_process
v3: resume the blank line
Signed-off-by: Yintian Tao
/1_SEM_WAIT_FAIL_TIMER_CNTL
Signed-off-by: Yintian Tao
Change-Id: I9d5087582ceb5f629d37bf856533d00c179e6de3
---
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 110 +
1 file changed, 75 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
b/drivers/gpu
conditions below.
- amdgpu_gpu_recovery=0
- TDR happened
- in_gpu_reset=0
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 83 -
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 7 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c| 23 ++
drivers
conditions below.
- amdgpu_gpu_recovery=0
- TDR happened
- in_gpu_reset=0
v2: merge amdgpu_virt_can_access_debugfs() into
amdgpu_virt_enable_access_debugfs()
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 73 +++--
drivers/gpu/drm/amd/amdgpu
If there is no GPU hang, user still can access
debugfs through kiq.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 12 +---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h | 2 ++
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd
: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 11 ---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 5 +++--
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 11 ++-
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c| 12
read_clock and move the reg_val_offs back
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 11 --
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.h | 5 +++--
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14
According to UMD design, only running performance analysis
benchmark just like RGP, GPA and so on need to update spm
register and others will not support this feature.
Therefore, we can directly access spm register through mmio.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu
Original idea is from Monk which only update spm vmid
at first time which can release the frequent r/w register
burden under virtualization.
v2: set spm_vmid_updated to false when job timedout
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 3 +++
drivers/gpu/drm/amd
, allocate fixed number wb slot for rreg use
and limit the submit number which depends on the kiq
ring_size in order to prevent the overwritten problem.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 7 +-
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 12
rreg slot then
directly print error log and return instead of busy waiting
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 8 +-
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 13 ++-
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 13 ++-
drivers/gpu/drm/amd
through KIQ
4. client-B poll the seqno-1
5. the kiq complete these two read operation
6. client-A to read the register at the wb buffer and
get REG-1 value
Therefore, use amdgpu_device_wb_get() to request reg_val_offs
for each kiq read register.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd
through KIQ
4. client-B poll the seqno-1
5. the kiq complete these two read operation
6. client-A to read the register at the wb buffer and
get REG-1 value
Therefore, use amdgpu_device_wb_get() to request reg_val_offs
for each kiq read register.
v2: fix the error remove
Signed-off-by: Yintian Tao
Wait for the oldest to be signaled to make sure
there will be no kiq overrun.
Signed-off-by: Yintian Tao
---
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 8 -
.../gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c | 8 -
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 30
Wait for the oldest sequence on the kiq ring
to be signaled in order to make sure there
will be no kiq overrun.
v2: remove unused the variable and correct
kiq max_sub_num value
Signed-off-by: Yintian Tao
---
.../drm/amd/amdgpu/amdgpu_amdkfd_gfx_v10.c| 6
.../gpu/drm/amd/amdgpu
Wait for the oldest sequence on the ring
to be signaled in order to make sure there
will be no command overrun.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 7 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 17 +++--
drivers/gpu/drm/amd/amdgpu
Wait for the oldest sequence on the ring
to be signaled in order to make sure there
will be no command overrun.
v2: fix coding stype and remove abs operation
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_fence.c | 10 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 22
)
[ 55.118877] [drm:amdgpu_device_init [amdgpu]] *ERROR* hw_init of IP block
failed -110
[ 55.126587] amdgpu :00:06.0: amdgpu_device_ip_init failed
[ 55.133466] amdgpu :00:06.0: Fatal error during GPU init
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 14
Under vega10 virtualuzation, smu ip block will not be added.
Therefore, we need add pp clk query and force dpm level function
at amdgpu_virt_ops to support the feature.
Change-Id: I713419c57b854082f6f739f1d32a055c7115e620
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 4 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 15 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 49 +++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.h
coding style
Change-Id: I713419c57b854082f6f739f1d32a055c7115e620
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 +
drivers/gpu/drm/amd/amdgpu/amdgpu_kms.c| 4 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 15 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
Under SRIOV, we need disable DRIVER_ATOMIC.
Otherwise, it will trigger WARN_ON at drm_universal_plane_init.
Change-Id: I96a78d6e45b3a67ab9b9534e7071ae5daacc0f4f
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
PSP fw primary buffer is not used under SRIOV
Therefore, we don't need to allocate memory for it.
Signed-off-by: Yintian Tao
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 22 +-
1 file changed, 13 insertions(+), 9 deletions(-)
diff --git a/dr
PSP fw primary buffer is not used under SRIOV.
Therefore, we don't need to allocate memory for it.
v2: remove superfluous check for amdgpu_bo_free_kernel().
Signed-off-by: Yintian Tao
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 17 ++---
1 file ch
For Vega10 SR-IOV, vram_width can't be read from ATOM as
RAVEN, and DF related registers is not readable, seems hardcord
is the only way to set the correct vram_width
Signed-off-by: Trigger Huang
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 7 +++
1 file ch
Under SRIOV, reading DF register has chance to lead to
AER error in host side, just skip reading it.
Signed-off-by: Monk Liu
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu
ff-by: Trigger Huang
Signed-off-by: Monk Liu
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index c221570..b5bf9ed 1
Under Sriov, there is no need of the support for fbcon.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 1f38d6f
We need reset compute ring wptr to zero when gpu reset
in order to prevent CP hang.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index
We should ensure mqd data take effect when gpu reset.
Otherwise, it will rasie ring ib tests failure.
Signed-off-by: Yintian Tao
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
b
we need register pm sysfs for virt in order
to support dpm level modification because
smu ip block will not be added under SRIOV
Signed-off-by: Yintian Tao
Change-Id: Ib0e13934c0c33da00f9d2add6be25a373c6fb957
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++
drivers/gpu/drm/amd/amdgpu
we need register pm sysfs for virt in order
to support dpm level modification because
smu ip block will not be added under SRIOV
Signed-off-by: Yintian Tao
Change-Id: Ib0e13934c0c33da00f9d2add6be25a373c6fb957
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++
drivers/gpu/drm/amd/amdgpu
there is no need to access register such as mmSMC_IND_INDEX_11
and mmSMC_IND_DATA_11 through KIQ because they are VF-copy.
Change-Id: I88302dc5945e0b0fa2e6411081fb798aab4fdb5e
Signed-off-by: Yintian Tao
Reviewed-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/vi.c | 4 ++--
1 file changed, 2
There is no need for gpu full access for suspend phase1
because under virtualization there is no hw register access
for dce block.
Change-Id: Ie1154e2065182ba968732af87f866f11141a102b
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 --
1 file changed, 6
: I7cbc55c650867d00e19241ceea5d98f78b5ac3f5
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
b/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
Under virtualization, We have to require full-acess gpu at
suspend phase2 due to some special register access. In order
to guarantee it, we should move set pg and cg state to suspend
phase2 to make registers access at one full-acess lifecycle.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd
It will be more safe to make full-acess include both phase1 and phase2.
Then accessing special registeris wherever at phase1 or phase2 will not
block any shutdown and suspend process under virtualization.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12
Under sriov, the disable operation is no allowed.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/hardwaremanager.c
b/drivers/gpu/drm/amd/powerplay/hwmgr
0x120
[ 45.074916] entry_SYSCALL_64_after_hwframe+0x44/0xa9
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 1 -
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c| 1 -
2 files changed, 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
b/drivers/gp
r+0x2c/0x40
[ 43.056008] pci_unregister_driver+0x22/0xa0
[ 43.056087] amdgpu_exit+0x15/0x57c [amdgpu]
[ 43.056090] __x64_sys_delete_module+0x146/0x280
[ 43.056094] do_syscall_64+0x5a/0x120
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 2 +-
1 file chan
0x120
[ 45.074916] entry_SYSCALL_64_after_hwframe+0x44/0xa9
v2: remove all debugfs cleanup/fini code at amdgpu
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 30 -
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.h | 1 -
drivers/gpu/drm/amd/a
Miss to remove pp_sclk file
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
index 9deff8cc9723..a43fc1c8ffd0 100644
--- a/drivers/gpu/drm
r+0x2c/0x40
[ 43.056008] pci_unregister_driver+0x22/0xa0
[ 43.056087] amdgpu_exit+0x15/0x57c [amdgpu]
[ 43.056090] __x64_sys_delete_module+0x146/0x280
[ 43.056094] do_syscall_64+0x5a/0x120
v2: put drm_dev_put after pci_set_drvdata
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/
not
really handle the packet on the ring buffer because rptr is equal to wptr.
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 1 +
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
b/drivers
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.
Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu
If doorbell is used for wptr update, we also need to use it
to initialize wptr to 0.
Change-Id: Ieb31a6726a9ac8d45e51f0370ef5f77dc5ec7c06
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
evict vram, it cause ISR directly return without
processing.Therefore, we need set the varible after evict vram.
Change-Id: I7bf75481aa0744b99c41672b49670adc70b478bd
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion
add smu_free_memory when smu fini to prevent memory leakage
Change-Id: Id9103d8b54869b63f22a9af53d9fbc3b7a221191
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/powerplay/smumgr
Due to typo error, it will cause compile error so fix it.
Change-Id: Iabe7158e08e6aef155ca3394cafc6eb4256a0030
Signed-off-by: Yintian Tao
---
drivers/gpu/drm/amd/powerplay/smumgr/smu7_smumgr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/powerplay
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