default VESA recommended configurations.
Reviewed-by: Martin Leung
Acked-by: Alex Hung
Signed-off-by: Wenjing Liu
---
drivers/gpu/drm/amd/display/dc/dc_hw_types.h | 24 +
.../gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 36 ++-
.../gpu/drm/amd/display/dc/dsc/dscc_types.h
From: Samson Tam
[Why]
MALL size available can vary for different SKUs
MALL size was still hardcoded for DCN321
[How]
Remove hardcoding MALL size for DCN321
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: Samson Tam
---
drivers/gpu/drm/amd/display/dc/dcn321/dcn321_resource.c | 1
From: Fangzhi Zuo
Add log for MST/PCON specific use case:
1. If DP1.2 hub where gives reduced link bw and no dsc support.
2. If less than 4-lane configuration where gives reduced bw.
3. If FRL PCON enabled for asic.
4. Track MST sink count.
Reviewed-by: Hersen Wu
Acked-by: Alex Hung
Signed
From: Nicholas Kazlauskas
[Why]
It's not supported in multi-display, but it is supported in 2nd eDP
screen only.
[How]
Remove multi display support, restrict number of planes for all
z-states support, but still allow Z8 if we're not using PWRSEQ0.
Reviewed-by: Charlene Liu
Acked-by:
From: Daniel Miess
[Why]
Underflow observed during P010 video playback on
dcn314 due to incorrectly populated bw_params
[How]
Populate fclk, memclk and voltage in bw_params with
values from max pstate rather than min pstate
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by
From: Daniel Miess
[Why]
Brackets missing in the calculation for MIN_DST_Y_NEXT_START
[How]
Add missing brackets for this calculation
Reviewed-by: Nicholas Kazlauskas
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Daniel Miess
---
.../gpu/drm/amd/display/dc/dml/dcn314
From: Leon Huang
[Why]
ABM set pipe before updating ODM status,
it leads to incorrect ABM pipe setting when enabling ODM combine.
[How]
Call ABM set pipe flow after ODM status update in program pipe sequence.
Reviewed-by: Chun-Liang Chang
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
: Nevenko Stupar
Acked-by: Alex Hung
Signed-off-by: Vladimir Stempen
---
drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c
index
From: Daniel Miess
[Why]
Lower max_downscale_ratio and ARGB888 downscale factor
to prevent cases where underflow may occur on dcn314
[How]
Set max_downscale_ratio to 400 and ARGB downscale factor
to 250 for dcn314
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Daniel
From: Aric Cyr
This reverts commit 82dca8576d14f3dcb775b3be5f1bbb5df9a682ac.
Acked-by: Alex Hung
Signed-off-by: Aric Cyr
---
.../dc/clk_mgr/dcn315/dcn315_clk_mgr.c| 26 +--
1 file changed, 6 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc
From: Mustapha Ghaddar
[WHY]
Housekeeping cleaning and adding declaration for
function to be called from DM layer
[HOW]
Adding public functions to dc_link.h
Reviewed-by: Jun Lei
Acked-by: Alex Hung
Signed-off-by: Mustapha Ghaddar
---
drivers/gpu/drm/amd/display/dc/dc_link.h | 27
From: George Shen
[Why]
The hwss function does_plane_fit_in_mall not applicable to dcn3.2 asics.
Using it with dcn3.2 can result in undefined behaviour.
[How]
Assign the function pointer to NULL.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: George Shen
---
drivers/gpu/drm/amd
in hw_init, but we
do need to remember to reset the last cached wptr value as well here.
Reviewed-by: Hansen Dsouza
Acked-by: Alex Hung
Signed-off-by: Nicholas Kazlauskas
---
drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c | 12
1 file changed, 12 insertions(+)
diff --git a/drive
link training for link lost.
Signed-off-by: Hersen Wu
Acked-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 24 ---
drivers/gpu/drm/amd/display/dc/dc_link.h | 3 +++
2 files changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display
DCN321
- add rc_params_override option in dc_dsc_config
- Enable Freesync over PCon
Acked-by: Alex Hung
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/drm/amd
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
- Fix underflow issue on 175hz timing
- Add interface to modify DMUB panel power options
- Remove check for default eDP panel_mode
- Add new sequence for 4-lane HBR3 on vendor specific retimers
- Update DPG test pat
From: Reza Amini
[Why]
There are grammer mistakes in comments
[How]
Correct grammar mistakes
Reviewed-by: Anthony Koo
Acked-by: Alex Hung
Signed-off-by: Reza Amini
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 20 ++-
1 file changed, 11 insertions(+), 9 deletions
From: George Shen
[Why]
Current yellow carp B0 PHYD32CLK logic is incorrectly applied to other
ASICs.
[How]
Add guard to check chip family is yellow carp before applying logic.
Reviewed-by: Hansen Dsouza
Acked-by: Alex Hung
Signed-off-by: George Shen
---
drivers/gpu/drm/amd/display/dc
From: Iswara Nagulendran
[How & Why]
When determining default aux backlight level, read from
DPCD address 0x734 for VESA SCR on OLED.
Reviewed-by: Felipe Clark
Acked-by: Alex Hung
Signed-off-by: Iswara Nagulendran
---
.../dc/link/protocols/link_edp_panel_control.c | 18 ++---
head_pipe is not in ODM. Preventing this
avoids creating an invalid context with an invalid pipe.
Reviewed-by: Alvin Lee
Acked-by: Alex Hung
Signed-off-by: Ethan Bitnun
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 37 +--
1 file changed, 34 insertions(+), 3 deletions(-)
diff
From: Alvin Lee
[Description]
It is not valid to set the WDIVIDER value to 0, so do not
re-write to DISPCLK_WDIVIDER if the current value is 0
(i.e., it is at it's initial value and we have not made any
requests to change DISPCLK yet).
Reviewed-by: Saaem Rizvi
Acked-by: Alex Hung
Signe
From: Martin Tsai
[Why]
Panels show corruption with high refresh rate timings when
ss is enabled.
[How]
Read down-spread percentage from lut to adjust dprefclk.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Martin Tsai
---
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.c
ed-by: Dmytro Laktyushkin
Acked-by: Alex Hung
Signed-off-by: Wenjing Liu
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 560 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 4 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 4 +-
.../drm/amd/display/dc/dml/
From: Leo Chen
[Why & How]
DMUB may hang when powering down pixel clocks due to no dprefclk.
It is fixed by exiting idle optimization before the attempt to access PHY.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex Hung
Signed-off-by: Leo Chen
---
drivers/gpu/drm/amd/display/dc/dc
Acked-by: Alex Hung
Signed-off-by: Reza Amini
---
.../amd/display/dc/dml/dcn314/dcn314_fpu.c| 25 ++-
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
b/drivers/gpu/drm/amd/display/dc/dml/dcn314/dcn314_fpu.c
From: Wenjing Liu
[Why]
Last ODM slice could be slightly larger than other slice because it can be
including the residual.
[How]
Update DPG pattern programming sequence to use a different width for
last odm slice.
Reviewed-by: Chris Park
Acked-by: Alex Hung
Signed-off-by: Wenjing Liu
: Michael Strauss
Acked-by: Alex Hung
Signed-off-by: Ovidiu Bunea
---
.../link_dp_training_fixed_vs_pe_retimer.c| 67 ++-
1 file changed, 66 insertions(+), 1 deletion(-)
diff --git
a/drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_training_fixed_vs_pe_retimer.c
b
From: Taimur Hassan
[Why]
DPCD read is skipped first time after driver initialization.
Reviewed-by: Charlene Liu
Acked-by: Alex Hung
Signed-off-by: Taimur Hassan
---
.../link/protocols/link_edp_panel_control.c | 49 +--
1 file changed, 24 insertions(+), 25 deletions
From: Anthony Koo
- Rearranged defs order
Acked-by: Alex Hung
Signed-off-by: Anthony Koo
---
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 54 +--
1 file changed, 26 insertions(+), 28 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
b/drivers/gpu
From: Paul Hsieh
[Why]
This option can vary depending on the panel and may be required to be
called during sink detection phase before transmitter control.
[How]
Allow modify the bit depending on the eDP panel connected with a new
interface.
Reviewed-by: Nicholas Kazlauskas
Acked-by: Alex
From: Leo Ma
[Why]
Screen underflows happen on 175hz timing for 3 plane overlay case.
[How]
Based on dst y prefetch value clamp to equ or oto for bandwidth
calculation.
Reviewed-by: Dillon Varone
Acked-by: Alex Hung
Signed-off-by: Leo Ma
---
.../amd/display/dc/dml/dcn32
range dmub_cmd defs order
- Add VESA SCR case for default aux backlight
- Guard DCN31 PHYD32CLK logic against chip family
- Correct grammar mistakes
Acked-by: Alex Hung
Signed-off-by: Aric Cyr
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --
Tested-by: Alex Hung
On 2023-07-31 02:35, Melissa Wen wrote:
Don't set predefined degamma curve to cursor plane if the cursor
attribute flag is not set. Applying a degamma curve to the cursor by
default breaks userspace expectation. Checking the flag before
performing any color transform
https://patchwork.freedesktop.org/series/122536/
Alex Hung (10):
drm/amd/display: Initialize writeback connector
drm/amd/display: Hande writeback request from userspace
drm/amd/display: Add writeback enable/disable in dc
drm/amd/display: Fix writeback_info never got updated
drm/amd/display: Validate hw_point
From: Harry Wentland
[WHY]
Previously this only excluded build for a few amdgpu_dm
binaries which makes no sense.
[HOW]
Wrap the entire Makefile in "ifneq ($(CONFIG_DRM_AMD_DC),)"
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/Mak
From: Harry Wentland
[WHAT]
Prepare a virtual connector for writeback.
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 11 +--
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c | 3 ++-
2 files changed, 11 insertions
[WHAT]
Create a drm_writeback_connector when connector signal equals
SIGNAL_TYPE_VIRTUAL.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/Makefile| 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 20 +-
.../drm/amd/display/amdgpu_dm/amdgpu_dm_wb.c | 209
ector.
[HOW]
Skip them when connector type is DRM_MODE_CONNECTOR_WRITEBACK.
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 62 +--
.../drm/amd/display/amdgpu_dm/amdgpu_dm_crc.c | 3 +
.../drm/amd/display/amdg
From: Harry Wentland
[WHY]
We will be dealing with two types of connector: amdgpu_dm_connector
and drm_writeback_connector.
[HOW]
We want to find both and then cast to the appriopriate type afterwards.
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display
From: Harry Wentland
[WHAT]
We need to use this function for both amdgpu_dm_connectors
and drm_writeback_connectors. Modify it to operate on
a drm_connector as a common base.
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 65
From: Harry Wentland
[WHAT]
Again, we need to use this function for writeback connectors,
which are not of type amdgpu_dm_connector. Use the common base
drm_connector instead.
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22
From: Harry Wentland
[WHY]
We need to track the dc_link and it would get confusing if
re-using the amdgpu_dm_connector.
[HOW]
Creating new amdgpu_dm_wb_connector.
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c| 5 +++--
.../gpu
From: Harry Wentland
[WHAT]
Writeback connectors don't have a physical sink but DC still
needs a sink to function. Create a fake sink and stream for
writeback connectors
Signed-off-by: Harry Wentland
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
[WHAT]
Handle writeback requests and fill in the required information for DWB
programming and setup.
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 3 +
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 159 ++
2 files changed, 162 insertions
[WHAT]
The enable and disable writeback calls need to be included in the
coressponding functions in dc_stream.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/core/dc_stream.c | 33 +++
.../drm/amd/display/dc/dcn30/dcn30_hwseq.c| 4 +++
2 files changed, 37
[WHY]
wb_enabled field is set to false before it is used, and the following
code will never be executed.
[HOW]
Setting wb_enable to false after all removal work is completed.
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 13 -
1 file changed, 4
[WHAT]
hw_points_num is 0 before ogam LUT is programmed; however, function
"dwb3_program_ogam_pwl" assumes hw_points_num is always greater than 0,
i.e. substracting it by 1 as an array index.
[HOW]
Check hw_points_num is not equal to 0 before using it.
Signed-off-by: Alex Hung
---
d
[WHY]
Counter j was not updated to present the num of writeback_info when
writeback pipes are removed.
[HOW]
update j (num of writeback info) under the correct condition.
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc_stream.c | 7 ---
1 file changed, 4 insertions
[WHAT]
Add a new field to keep track whether a crtc is previously
writeback-enabled.
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | 1 +
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 8
2 files changed, 9 insertions(+)
diff --git a/drivers/gpu
[WHY]
Hardware may require different warmup approaches - big buffer or
individual buffers.
[HOW]
Setup warmup for big buffer when it is required by specific hardware.
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++
1 file changed, 6 insertions
[WHAT]
Add a function to enable and disable DWB's frame captures.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/dcn30/dcn30_dwb.c | 23 +++
.../gpu/drm/amd/display/dc/dcn30/dcn30_dwb.h | 2 ++
drivers/gpu/drm/amd/display/dc/inc/hw/dwb.h | 4
3 files ch
[WHY]
drm_writeback requires to capture exact one frame in each writeback
call.
[HOW]
frame_capture is disabled after each writeback is completed.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 14 +-
.../gpu/drm/amd/display/dc/core/dc_stream.c | 27
es or fork
the function as reverting these patches causes regressions.
Cheers,
Alex
BR,
Jani.
Cc: Alex Deucher
Cc: Alex Hung
Cc: Chao-kai Wang
Cc: Daniel Wheeler
Cc: Harry Wentland
Cc: Hersen Wu
Cc: Leo Li
Cc: Rodrigo Siqueira
Cc: Wenchieh Chien
Cc: David Airlie
Cc: Daniel Vetter
No regressed found on this patchset series.
Reviewed-by: Alex Hung
On 9/27/24 17:05, Mario Limonciello wrote:
From: Mario Limonciello
This is the successor of Melissa's v5 series that was posted [1] as well
as my series that was posted [2].
Melissa's patches are mostly unmodifi
On 10/13/24 09:58, Simon Ser wrote:
On Thursday, October 3rd, 2024 at 22:01, Harry Wentland
wrote:
From: Alex Hung
It is to be used to enable HDR by allowing userpace to create and pass
3D LUTs to kernel and hardware.
1. new drm_colorop_type: DRM_COLOROP_3D_LUT.
2. 3D LUT modes define
On 11/11/24 05:08, Bhavin Sharma wrote:
The mode_422 variable is initialized to zero, making mode_422 ? 2 : 1
always false.
Since is_dsc_possible is already checked just above, there's no need to
check it again before filling out the DSC settings.
Removing this redundant check simplifies the
Mario and Melissa,
Another regression identified on this patch - DP Display is not listed
as an audio device after this patch is applied.
Cheers,
Alex Hung
On 9/18/24 15:38, Mario Limonciello wrote:
From: Melissa Wen
drm_edid_connector_update() updates display info, filling ELD with
Hi Mario and Melissa,
There are three regressions identified during the test, and improvement
is required before the patches can be merged. Please see details below.
1. null pointer when hot-plugging a dsc hub (+ three 4k60 monitors).
This may point to "drm/amd/display: use drm_edid_product_i
, and help from Mario
to rebase is probably needed.
As for the rest, let me know if you cannot reproduce these issues since
you may or may not have the same hardware configs.
Melissa
On 27/09/2024 15:48, Alex Hung wrote:
Hi Mario and Melissa,
There are three regressions identified during the
A minor comment (see inline below).
Otherwise
Reviewed-by: Alex Hung
On 2024-09-18 15:38, Mario Limonciello wrote:
Some manufacturers have intentionally put an EDID that differs from
the EDID on the internal panel on laptops.
Attempt to fetch this EDID if it exists and prefer it over the
Mario and Melissa,
This patch causes a regrerssion on 7900 XTX in an IGT test:
amd_mem_leak's connector-suspend-resume.
Is this patch necessary on this series or is it independent from other
patches, i.e. can it be dropped from this series until fixed??
Cheers,
Alex Hung
On 9/18/24
Signed-off-by: Samson Tam
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/dc_spl_translate.c | 8 +++--
drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 31 ++-
.../gpu/drm/amd/display/dc/spl/dc_spl_types.h | 10 --
3 files changed, 37 insertions(+), 12 deletions
: Nicholas Kazlauskas
Signed-off-by: Lo-an Chen
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
b/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c
vidiu Bunea
Signed-off-by: Nicholas Kazlauskas
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/display/dc/dc.h
b/drivers/gpu/dr
g Liu
Signed-off-by: Chris Park
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 42 ++-
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../gpu/drm/amd/display/dc/dc_spl_translate.c | 2 +-
.../dc/dml2/dml21/dml21_translation_helper.c
d-by: Anthony Koo
Signed-off-by: Dillon Varone
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dc.h | 1 +
.../dc/dml2/dml21/dml21_translation_helper.c | 27 +--
.../dc/resource/dcn30/dcn30_resource.c| 1 +
.../dc/resource/dcn302/dcn302_resour
This DC patchset brings improvements in multiple areas. In summary, we have:
* Add hblank borrowing support
* Limit VTotal range to max hw cap minus fp
* Correct prefetch calculation
* Add option to retrieve detile buffer size
* Add support for custom recout_width in SPL
* Add disable_ips_in_dpms_
-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/spl/dc_spl.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/spl/dc_spl.c
b/drivers/gpu/drm/amd/display/dc/spl/dc_spl.c
index 73a65913cb12..27fd20fa2942 100644
--- a/drivers/gpu/drm/amd
ucher
Cc: sta...@vger.kernel.org
Reviewed-by: George Shen
Signed-off-by: Peterson Guo
Signed-off-by: Alex Hung
---
.../dc/resource/dcn20/dcn20_resource.c| 23 +++
1 file changed, 23 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource
Lee
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 18 ++
drivers/gpu/drm/amd/display/dc/dc.h| 2 ++
.../gpu/drm/amd/display/dc/inc/core_types.h| 1 +
.../display/dc/resource/dcn31/dcn31_resource.c | 7 +++
.../display/dc
- Enable EASF based on luma taps only
- Add a left edge pixel if in YCbCr422 or YCbCr420 and odm
Reviewed-by: Alex Hung
Signed-off-by: Aric Cyr
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm
Use DC_LOG_DEBUG instead of pr_info to match other uses in dc.c.
Fixes: eb8eec752038 ("drm/amd/display: Add debug messages for
dc_validate_boot_timing()")
Reviewed-by: Mario Limonciello
Signed-off-by: Alex Hung
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 2 +-
1 file changed, 1
On 2/10/25 15:18, Mario Limonciello wrote:
On 2/9/2025 16:50, Melissa Wen wrote:
When switching to drm_edid, we slightly changed how to get edid by
removing the possibility of getting them from dc_link when in aux
transaction mode. As MST doesn't initialize the connector with
`drm_connector_in
colorop:
1. 1D curve colorop w/ sRGB EOTF
Signed-off-by: Alex Hung
Co-developed-by: Harry Wentland
Signed-off-by: Harry Wentland
---
v7:
- Fix checkpatch warnings
- Change switch "{ }" position
- Delete double ";"
- Delete "{ }" for single-line if-state
cursor plane does not need to have color pipeline.
Signed-off-by: Alex Hung
---
v7:
- Add a commit messages
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
b/drivers/gpu/drm
ch
is used by a driver to advertise the supported SIZE
of the LUT, as well as a DATA property which userspace
uses to set the LUT.
DATA and size function in the same way as current drm_crtc
GAMMA and DEGAMMA LUTs.
Signed-off-by: Alex Hung
Co-developed-by: Harry Wentland
Signed-off-by: Harry Wen
colorops:
1. 1D curve colorop
2. 1D curve colorop
3. 1D LUT
4. 1D curve colorop
5. 1D LUT
The 1D curve colorops support sRGB, BT2020, and PQ scaled to 125.0.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Initialize uint32_t blend_size = 0 by default (kernel test robot)
- Modify
-bt2020_oetf
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 11 ---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 10 +++---
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm
-ctm_3x4_bt709_enc
kms_colorop --run plane-XR30-XR30-ctm_3x4_bt709_dec
The color pipeline now consists of the following colorops:
1. 1D curve colorop
2. 3x4 CTM
3. 1D curve colorop
4. 1D LUT
5. 1D curve colorop
6. 1D LUT
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Change %lu
This adds support for a 3D LUT.
The color pipeline now consists of the following colorops:
1. 1D curve colorop
2. Multiplier
3. 3x4 CTM
4. 1D curve colorop
5. 1D LUT
6. 3D LUT
7. 1D curve colorop
8. 1D LUT
Signed-off-by: Alex Hung
---
v7:
- Simplify 3D LUT according to drm_colorop changes
From: Harry Wentland
Not all HW will be able to do bypass on all color
operations. Introduce an 'allow_bypass' boolean for
all colorop init functions and only create the BYPASS
property when it's true.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/di
It is to be used to enable HDR by allowing userpace to create and pass
3D LUTs to kernel and hardware.
new drm_colorop_type: DRM_COLOROP_3D_LUT.
Signed-off-by: Alex Hung
---
v7:
- Simplify 3D LUT by removing lut_3d_modes and related functions (Simon Ser)
drivers/gpu/drm/drm_atomic.c
-XR30-XR30-srgb_eotf-srgb_inv_eotf
The color pipeline now consists of the following colorops:
1. 1D curve colorop w/ sRGB EOTF support
2. 1D curve colorop w/ sRGB Inverse EOTF support
Signed-off-by: Alex Hung
Co-developed-by: Harry Wentland
Signed-off-by: Harry Wentland
---
v6:
- don't
pipeline now consists of the following colorops:
1. 1D curve colorop w/ sRGB EOTF support
2. 1D curve colorop w/ sRGB Inverse EOTF support
3. 1D curve colorop w/ sRGB EOTF support
Signed-off-by: Alex Hung
Co-developed-by: Harry Wentland
Signed-off-by: Harry Wentland
---
v7:
- Initialized
eason AMD HW hard-codes a PQ
function that is scaled by 125, yielding 80 nit PQ values for
1.0 and 10,000 nits at 125.0.
This patch introduces this scaled PQ EOTF and its inverse as
1D curve types.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_colorop.c
plane-XR30-XR30-pq_125_inv_eotf
kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf
kms_colorop --run plane-XR30-XR30-pq_125_eotf-pq_125_inv_eotf-pq_125_eotf
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 20
transfer function)
instead of as EOTF (electro-optical transfer function).
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
drivers/gpu/drm/drm_colorop.c | 2 ++
include/drm/drm_colorop.h | 19 +++
2 files changed, 21 insertions(+)
diff --git a/drivers/gpu/drm
Swap the order of matrix and multiplier as designed in hardware.
Signed-off-by: Alex Hung
---
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 12 ++--
.../drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c| 8
2 files changed, 10 insertions(+), 10 deletions(-)
diff
From: Harry Wentland
We want to make sure userspace is aware of the 1D LUT
interpolation. While linear interpolation is common it
might not be supported on all HW. Give driver implementers
a way to specify their interpolation.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7
This introduces a new drm_colorop_type: DRM_COLOROP_MULTIPLIER.
It's a simple multiplier to all pixel values. The value is
specified via a S31.32 fixed point provided via the
"MULTIPLIER" property.
Signed-off-by: Alex Hung
---
v7:
- Modify size_property to lut_size_property
colorops:
1. 1D curve colorop
2. 3x4 CTM
3. Multiplier
4. 1D curve colorop
5. 1D LUT
6. 1D curve colorop
7. 1D LUT
Signed-off-by: Alex Hung
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 40 +++
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 16
2 files changed, 56
From: Harry Wentland
Add kernel doc for AMD color pipeline.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 122 +++---
1 file changed, 102 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/display
The functions are to clean up color pipeline when a device driver
fails to create its color pipeline.
Signed-off-by: Alex Hung
---
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 3 +-
drivers/gpu/drm/drm_colorop.c | 41 +++
drivers/gpu/drm/vkms/vkms_colorop.c
From: Harry Wentland
Add the default Bypass pipeline and ensure it passes the
kms_colorop test plane-XR30-XR30-bypass.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 19 +++
1 file changed, 19 insertions(+)
diff
Add layout of data blob for colorop types: DRM_COLOROP_1D_LUT,
DRM_COLOROP_CTM_3X4 and DRM_COLOROP_3D_LUT
Signed-off-by: Alex Hung
---
include/drm/drm_colorop.h | 18 ++
1 file changed, 18 insertions(+)
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index
Create a new macro for_each_new_colorop_in_state to access new
drm_colorop_state updated from uapi.
Signed-off-by: Alex Hung
---
include/drm/drm_atomic.h | 20
1 file changed, 20 insertions(+)
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index
On 10/4/24 05:43, Louis Chauvet wrote:
On 03/10/24 - 16:01, Harry Wentland wrote:
Not all HW will be able to do bypass on all color
operations. Introduce an 'allow_bypass' boolean for
all colorop init functions and only create the BYPASS
property when it's true.
Signed-off-by: Harry Wentland
color
pipelines, as well as set the desired one. The color
pipelines are programmed via properties on the actual
drm_colorop objects.
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Fix a checkpatch warning - a new line after variable declaration
v4:
- Add pipeline property cre
From: Harry Wentland
Print atomic state for drm_colorop in debugfs
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Add a commit messages
- Squash "drm/colorop: Add NEXT to colorop state print" (Simon Ser)
drivers/gpu/drm/drm_atomic.c | 26 +++
From: Harry Wentland
Two tests are added to VKMS LUT handling:
- linear
- inv_srgb
Reviewed-by: Louis Chauvet
Signed-off-by: Alex Hung
Signed-off-by: Harry Wentland
---
v7:
- Fix checkpatch warnings (Louis Chauvet)
- Adde a commit messages
- Fix code styles by adding and removing spaces
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