Need to use the correct IP block type. VCE vs VCN.
Fixes mclk issues on Hawaii.
Suggested by selendym.
Fixes: 82ae6619a450a ("drm/amdgpu: update the handle ptr in wait_for_idle")
Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3997
Cc: Sunil Khatri
Signed-off-by: Alex Deucher
---
driv
On Sat, Mar 8, 2025 at 3:39 AM Alexandre Demers
wrote:
>
> Hi,
>
> While working on cleaning up sid.h, si_enums.h and some other SI
> related files, I've been scratching my head about why SI DMA files and
> variables were named "DMA" compared to CIK and over where "SDMA" is
> used.
>
> While I und
Keep a uniform way of where and how variables are defined between
DCE6, DCE8 and DCE10. It is easier to understand the code, their
similarities and their modifications.
Since sid.h is being wired up in dce_v6_0.c, duplicated defines need to be
cleaned up in sid.h and si_enums.h.
V4:
* Reorder pat
On Sat, Mar 8, 2025 at 7:32 PM Alexandre Demers
wrote:
>
> On Thu, Mar 6, 2025 at 10:19 AM Alex Deucher wrote:
> >
> > On Wed, Mar 5, 2025 at 9:08 PM Alexandre Demers
> > wrote:
> > >
> > > For coherence with DCE8 et DCE10, add or move some values under sid.h.
> > >
> > > Signed-off-by: Alexandr
On Sun, Mar 9, 2025 at 12:47 PM Alex Deucher wrote:
>
> On Sat, Mar 8, 2025 at 3:39 AM Alexandre Demers
> wrote:
> >
> > Hi,
> >
> > While working on cleaning up sid.h, si_enums.h and some other SI
> > related files, I've been scratching my head about why SI DMA files and
> > variables were named
By wiring up sid.h in GFX6, we end up with a few duplicated defines such as
the golden registers. Let's clean this up.
[TAHITI,VERDE, HAINAN]_GB_ADDR_CONFIG_GOLDEN were defined both in sid.h
and under si_enums.h, with different values. Keep the values used under radeon
and move them under gfx_v6_0
On 2025-03-09 12:31, Alex Deucher wrote:
Need to use the correct IP block type. VCE vs VCN.
Fixes mclk issues on Hawaii.
Suggested by selendym.
Fixes: 82ae6619a450a ("drm/amdgpu: update the handle ptr in wait_for_idle")
Closes:https://gitlab.freedesktop.org/drm/amd/-/issues/3997
Cc: Sunil Kha
[Why]
If reset is detected and kfd need to evict working queues, HWS moving queue
will be failed.
Then remaining queues are not evicted and in active state.
After reset done, kfd uses HWS to termination remaining activated queues but
HWS is resetted.
So remove queue will be failed again.
[How]
Let's begin the cleanup in sid.h to prevent warnings and errors when wiring
sid.h into dce_v6_0.c.
This is a bigger cleanup.
Many defines found under sid.h have already been properly moved
into the different "_d.h" and "_sh_mask.h", so they should have been
already removed from sid.h and properly
On Sun, Mar 9, 2025 at 12:49 PM Alexandre Demers
wrote:
>
> Keep a uniform way of where and how variables are defined between
> DCE6, DCE8 and DCE10. It is easier to understand the code, their
> similarities and their modifications.
>
> Since sid.h is being wired up in dce_v6_0.c, duplicated defin
[AMD Official Use Only - AMD Internal Distribution Only]
Thanks Felix. Declaring err inside the if block is better. I have submitted
patch, could you please help to review it?
Thanks.
Best regard,
Yifan Zha
From: Kuehling, Felix
Sent: Saturday, March 8,
[AMD Official Use Only - AMD Internal Distribution Only]
From: Chen, Xiaogang
Sent: Saturday, March 8, 2025 8:38 AM
To: Deng, Emily ; amd-gfx@lists.freedesktop.org
Subject: Re: [PATCH v4] drm/amdgpu: Fix the race condition for draining retry
fault
On 3/6/2025 7:27 PM, Deng, Emily wrote:
[A
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