[PATCH] drm/amdgpu: Fix error handling in amdgpu_ras_add_bad_pages

It ensures that appropriate error codes are returned when an error condition is detected Fixes the below; drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2849 amdgpu_ras_add_bad_pages() warn: missing error code here? 'amdgpu_umc_pages_in_a_row()' failed. drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2884 amdgp

Re: [PATCH v11 5/5] drm/amdgpu: track bo memory stats at runtime

Am 12.12.24 um 16:52 schrieb Yunxiang Li: Before, every time fdinfo is queried we try to lock all the BOs in the VM and calculate memory usage from scratch. This works okay if the fdinfo is rarely read and the VMs don't have a ton of BOs. If either of these conditions is not true, we get a massiv

[PATCH 1/3] drm/amdgpu/sdma4.4.2: add apu support in sdma queue reset

From: "jesse.zh...@amd.com" Remove apu check in sdma queue reset. Signed-off-by: Jesse Zhang --- drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c ind

[PATCH 2/3] drm/amd/pm: update 13_0_6 ppsmc header

From: "jesse.zh...@amd.com" add the definition PPSMC_MSG_ResetSDMA2. Signed-off-by: Jesse Zhang --- drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu_v13_0_6_ppsmc.h | 1 + drivers/gpu/drm/amd/pm/swsmu/inc/smu_types.h | 3 ++- drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c

[PATCH 3/3] drm/amdgpu/pm: Implement SDMA queue for different asic

From: "jesse.zh...@amd.com" Implement sdma queue reset by SMU_MSG_ResetSDMA2. Signed-off-by: Jesse Zhang --- .../drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt.c | 28 ++- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_6_ppt

[PATCH 3/3] drm/amdgpu: partially revert "reduce reset time"

This partially reverts commit 194eb174cbe4fe2b3376ac30acca2dc8c8beca00. This commit introduced a new state variable into adev without even remotely worrying about CPU barriers. Since we already have the amdgpu_in_reset() function exactly for this use case partially revert that. Signed-off-by: Ch

[PATCH 2/3] drm/amdgpu: set the VM pointer to NULL in amdgpu_job_prepare

As soon as the prepare phase is completed the VM might be released, better set it to NULL. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_job.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_job.c b/drivers/gpu/drm/amd/amdgpu/a

[PATCH 1/3] drm/amdgpu: fix amdgpu_coredump

The VM pointer might already be outdated when that function is called. Use the PASID instead to gather the information instead. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_dev_coredump.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/gpu

Re: [PATCH 1/3] drm/amdgpu: fix amdgpu_coredump

Sunil please take a look as well. Thanks, Christian. Am 13.12.24 um 09:52 schrieb Christian König: The VM pointer might already be outdated when that function is called. Use the PASID instead to gather the information instead. Signed-off-by: Christian König --- drivers/gpu/drm/amd/amdgpu/am

Re: [PATCH v2 1/7] drm/amdgpu: Add mqd for userq compute queue

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Add mqd for userq compute queue for gfx11/gfx12 Signed-off-by: Arunpravin Paneer Selvam Acked-by: Christian König --- drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c| 4 drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c| 4 drivers/g

Re: [PATCH v2 2/7] drm/amdgpu: Fix NULL ptr dereference issue for non userq fences

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Add the correct fences count variable [num_fences] in the fences array iteration to handle the userq / non-userq fences. v2:(Christian) - All fences in the array either come from some reservation object or drm_syncobj. If any of thos

Re: [PATCH v2 3/7] drm/amdgpu: Fix the use-after-free issue in wait IOCTL

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: The xarray pointer which has the userqueue xarray structure reference should be cleared when the userqueue gets destroyed. Otherwise, we may access the freed xa memory and see the below warnings. warning 1: BUG: KASAN: slab-use-after-free in

Re: [PATCH v2 6/7] drm/amdgpu: Fix wait IOCTL lockup issues.

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Fix the wait IOCTL lockup issue. [Dec 6 17:53] watchdog: BUG: soft lockup - CPU#4 stuck for 26s! [Xwayland:cs0:2634] [ +0.02] RIP: 0010:amdgpu_userq_wait_ioctl+0x3ce/0xfe0 [amdgpu] [ +0.03] RSP: 0018:ada901f4fc38 EFLAGS: 0

Re: [PATCH v2 7/7] drm/amdgpu: Apply sign extension to seq64

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Apply sign extension to seq64 va address. Signed-off-by: Arunpravin Paneer Selvam Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_seq64.c | 8 ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a

Re: [PATCH v2 4/7] drm/amdgpu: Fix out-of-bounds issue in user fence

Hi Christian, On 12/13/2024 4:13 PM, Christian König wrote: Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Fix out-of-bounds issue in userq fence create when accessing the userq xa structure. Added a lock to protect the race condition. BUG: KASAN: slab-out-of-bounds in amdgpu_userq_f

Re: [PATCH v2 4/7] drm/amdgpu: Fix out-of-bounds issue in user fence

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Fix out-of-bounds issue in userq fence create when accessing the userq xa structure. Added a lock to protect the race condition. BUG: KASAN: slab-out-of-bounds in amdgpu_userq_fence_create+0x726/0x880 [amdgpu] [ +0.06] Call Trace: [ +0

Re: [PATCH v2 5/7] drm/amdgpu: Modify the MES process va end limit

Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: From: Christian König Modify the MES process va end limit to max pfn. Signed-off-by: Christian König Signed-off-by: Arunpravin Paneer Selvam Reviewed-by: Christian König --- drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 3 +-- d

Re: [PATCH v2 4/7] drm/amdgpu: Fix out-of-bounds issue in user fence

Am 13.12.24 um 12:24 schrieb Paneer Selvam, Arunpravin: Hi Christian, On 12/13/2024 4:13 PM, Christian König wrote: Am 12.12.24 um 15:25 schrieb Arunpravin Paneer Selvam: Fix out-of-bounds issue in userq fence create when accessing the userq xa structure. Added a lock to protect the race cond

Re: [PATCH 10/34] drm/amd/display: Add debug prints for IPS testing

On 12/11/24 08:18, Hung, Alex wrote: [AMD Official Use Only - AMD Internal Distribution Only] Hi Guenter, Thanks for the updates. This may be a real issue. Please file a bug at https://gitlab.freedesktop.org/drm/amd/-/issues  and share your s

[PATCH v11 1/2] drm/atomic: Let drivers decide which planes to async flip

Currently, DRM atomic uAPI allows only primary planes to be flipped asynchronously. However, each driver might be able to perform async flips in other different plane types. To enable drivers to set their own restrictions on which type of plane they can or cannot flip, use the existing atomic_async

Re: [PATCH v10 2/4] drm/doc: Document device wedged event

Em 28/11/2024 12:37, Raag Jadav escreveu: Add documentation for device wedged event in a new 'Device wedging' chapter. The describes basic definitions, prerequisites and consumer expectations along with an example. v8: Improve documentation (Christian, Rodrigo) v9: Add prerequisites secti

[PATCH 1/1] drm/amdgpu: Use device wedged event

Use DRM's device wedged event to notify userspace that a reset had happened. For now, only use `none` method meant for telemetry capture. Signed-off-by: André Almeida --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/

Re: [PATCH v10 1/4] drm: Introduce device wedged event

Hi Raag, Thank you for your patch. Em 28/11/2024 12:37, Raag Jadav escreveu: [...] +int drm_dev_wedged_event(struct drm_device *dev, unsigned long method) +{ + const char *recovery = NULL; + unsigned int len, opt; + /* Event string length up to 28+ characters with available

[PATCH 0/1] drm/amdgpu: Use device wedged event

Raag Jadav is introducing a new DRM API for generating "device wedged events", to notify userspace when the device needs userspace intervention after a GPU reset[1]. I did a simple patch to add support for it for amdgpu for the telemetry aspect of the event. Tested in Steam Deck. This patch require

[PATCH v11 2/2] drm/amdgpu: Enable async flip on overlay planes

amdgpu can handle async flips on overlay planes, so allow it for atomic async checks. Signed-off-by: André Almeida --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c | 11 +++ 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amd

[bug report] drm/amdgpu: parse legacy RAS bad page mixed with new data in various NPS modes

Hello Tao Zhou, Commit a8d133e625ce ("drm/amdgpu: parse legacy RAS bad page mixed with new data in various NPS modes") from Oct 31, 2024 (linux-next), leads to the following Smatch static checker warning: drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c:2849 amdgpu_ras_add_bad_pages() warn: missing error

[PATCH v11 0/2] drm/atomic: Ease async flip restrictions

Hi, The goal of this work is to find a nice way to allow amdgpu to perform async page flips in the overlay plane as well, not only on the primary one. Currently, when using the atomic uAPI, this is the only type of plane allowed to do async flips, and every driver accepts it. This patchset re-use

Re: [RESEND] amdkfd: always include uapi header in priv.h

On 11/5/2024 6:35 PM, Lazar, Lijo wrote: > > On 11/5/2024 2:13 AM, Felix Kuehling wrote: >> On 2024-10-31 22:15, Zhu Lingshan wrote: >>> On 10/31/2024 11:27 PM, Felix Kuehling wrote: On 2024-10-31 6:47, Zhu Lingshan wrote: > The header usr/linux/kfd_ioctl.h is a duplicate of uapi/linux/kfd

[WARNING][AMDGPU] WQ_MEM_RECLAIM with Radeon RX 6600

Hi, I've just noticed this warning in my dmesg log. This is a vanilla 6.12.4 kernel, with a Radeon RX6600 graphics card. Cheers, Chris [ 4624.741148] [ cut here ] [ 4624.744474] workqueue: WQ_MEM_RECLAIM sdma0:drm_sched_run_job_work [gpu_sched] is flushing !WQ_MEM_RECLAIM

Re: [PATCH V2] amdkfd: wq_release signals dma_fence only when available

On 2024-12-13 02:08, Zhu Lingshan wrote: kfd_process_wq_release() signals eviction fence by dma_fence_signal() which wanrs if dma_fence is NULL. kfd_process->ef is initialized by kfd_process_device_init_vm() through ioctl. That means the fence is NULL for a new created kfd_process, and close a k

[PATCH 4/6] drm/amdkfd: Queue interrupt work to different CPU

For CPX mode, each KFD node has interrupt worker to process ih_fifo to send events to user space. Currently all interrupt workers of same adev queue to same CPU, all workers execution are actually serialized and this cause KFD ih_fifo overflow when CPU usage is high. Use per-GPU unbounded highpri

[PATCH 3/6] drm/amdgpu: Optimize gfx v9 GPU page fault handling

After GPU page fault, there are lots of page fault interrupts generated at short period even with CAM filter enabled because the fault address is different. Each page fault copy to KFD ih fifo to send event to user space by KFD interrupt worker, this could cause KFD ih fifo overflow while other pro

[PATCH 2/6] drm/amdkfd: KFD interrupt access ih_fifo data in-place

To handle 4 to 8 interrupts per second running CPX mode with 4 streams/queues per KFD node, KFD interrupt handler becomes the performance bottleneck. Remove the kfifo_out memcpy overhead by accessing ih_fifo data in-place and updating rptr with kfifo_skip_count. Signed-off-by: Philip Yang

[PATCH 1/6] drm/amdgpu: Don't enable sdma 4.4.5 CTXEMPTY interrupt

The sdma context empty interrupt is dropped in amdgpu_irq_dispatch as unregistered interrupt src_id 243, this interrupt accounts to 1/3 of total interrupts and causes IH primary ring overflow when running stressful benchmark application. Disable this interrupt has no side effect found. Signed-off-

Re: [PATCH] amdkfd: enlarge the hashtable of kfd_process

On 2024-12-13 01:52, Zhu Lingshan wrote: This commit enlarges the hashtable size of kfd_process to 256 That's obvious. Can you state the reason why you're making that change? Does this change make sense stand-alone, or should it be part of your multi-context patch series? Regards,   Felix

[PATCH 6/6] drm/amdgpu: Show warning message if IH ring overflow

If IH primary ring and KFD ih fifo overflows, we may miss CP, SDMA interrupts and cause application soft hang. Show warning message with ring name if overflow happens. Add function to get ih ring name to avoid duplicating it. To keep warning message consistent between GPU generations, change all *

[PATCH 5/6] drm/amdkfd: Improve signal event slow path

If event slot is not signaled, kfd_signal_event_interrupt goes to slow path to scan all event slots to find the signaled event, this is needed for old ASICs that don't have the event ID or the event IDs are incorrect in the IH payload. There is case that GPU signal the same event twice, then drive

Re: [RESEND] amdkfd: always include uapi header in priv.h

On 2024-12-13 04:03, Zhu Lingshan wrote: On 11/5/2024 6:35 PM, Lazar, Lijo wrote: On 11/5/2024 2:13 AM, Felix Kuehling wrote: On 2024-10-31 22:15, Zhu Lingshan wrote: On 10/31/2024 11:27 PM, Felix Kuehling wrote: On 2024-10-31 6:47, Zhu Lingshan wrote: The header usr/linux/kfd_ioctl.h is a d

Re: [PATCH 0/1] drm/amdgpu: Use device wedged event

On Thu, Dec 12, 2024 at 04:09:08PM -0300, André Almeida wrote: Raag Jadav is introducing a new DRM API for generating "device wedged events", to notify userspace when the device needs userspace intervention after a GPU reset[1]. I did a simple patch to add support for it for amdgpu for the teleme

[PATCH 08/17] drm/amd/display: Add new message for DF throttling optimization on dcn401

From: Dillon Varone [WHY] When effective bandwidth from the SoC is enough to perform SubVP prefetchs, then DF throttling is not required. [HOW] Provide SMU the required clocks for which DF throttling is not required. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Rodrigo S

[PATCH 04/17] drm/amd/display: init dc_power_state

From: Charlene Liu Initialize the power state for dc use Reviewed-by: Chris Park Signed-off-by: Charlene Liu Signed-off-by: Rodrigo Siqueira --- drivers/gpu/drm/amd/display/dc/core/dc.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/c

[PATCH 09/17] drm/amd/display: delete legacy code

From: Shunlu Zhang Delete unused code. Reviewed-by: Jun Lei Signed-off-by: Shunlu Zhang Signed-off-by: Rodrigo Siqueira --- .../display/dc/dml/dcn30/display_rq_dlg_calc_30.c| 1 + .../amd/display/dc/dml2/dml_display_rq_dlg_calc.c| 12 2 files changed, 1 insertion(+), 12

[PATCH 10/17] drm/amd/display: Apply (some) policy for DML2 formulation on DCN35/DCN351

From: Nicholas Kazlauskas [Why] Dropping the entirety of dml2_policy_build_synthetic_soc_states exposes an issue for states that cannot be filled via bbox_overrides and rely on the default parameters that may or may not be present depending on the DM. For amdgpu_dm this results in missing parame

[PATCH 05/17] drm/amd/display: Fix Mode Cutoff in DSC Passthrough to DP2.1 Monitor

From: Fangzhi Zuo Source --> DP2.1 MST hub --> DP1.4/2.1 monitor When change from DP1.4 to DP2.1 from monitor manual, modes higher than 4k120 are all cutoff by mode validation. Switch back to DP1.4 gets all the modes up to 4k240 available to be enabled by dsc passthrough. [why] Compared to DP1.

[PATCH 06/17] drm/amd/display: Fix brightness adjustment on MiniLED

From: Harry VanZyllDeJong [Why] Older Asics were changed to target new DCN while still needing older support causing brightness adjustments to fail. [How] Reverted the DCN targets on required DCNs Reviewed-by: Iswara Nagulendran Signed-off-by: Harry VanZyllDeJong Signed-off-by: Rodrigo Siquei

[PATCH 00/17] DC Patches Dec 13, 2024

* Update DML21 code. * Fixes for FAMS2 interface. * HDMI fixes. * Compilation warning fixes.   Cc: Daniel Wheeler Alex Hung (1): drm/amd/display: Fix uninitialized variables in amdgpu_dm_debugfs Alvin Lee (1): drm/amd/display: Update FAMS2 config cmd Aric Cyr (1): drm/amd/display: 3.2.314

[PATCH 01/17] drm/amd/display: Update FAMS2 config cmd

From: Alvin Lee The FAMS2 stream and sub-state have been separated into 2 different commands. Update the cmd function to send one command each for the stream and sub-state. Reviewed-by: Dillon Varone Signed-off-by: Alvin Lee Signed-off-by: Rodrigo Siqueira --- drivers/gpu/drm/amd/display/dc/

[PATCH 03/17] drm/amd/display: initialize uninitialized variable

From: Meerpate Patel [WHY] There is one uninitialized variable in file dc/hwss/dcn401/dcn401_hwseq.c, which trigger com compile warnings. [HOW] Initialize the unininitialized variable. Reviewed-by: Ariel Bernstein Signed-off-by: Meerpate Patel Signed-off-by: Rodrigo Siqueira --- drivers/gpu

[PATCH 02/17] drm/amd/display: Add support for FAMS2+ interface versions

From: Dillon Varone Current driver interface does not allow for flexibility in coexistence of multiple interface versions, so add support for checking minor interface revisions and providing appropriate programming. Reviewed-by: Alvin Lee Signed-off-by: Dillon Varone Signed-off-by: Rodrigo Siq

[PATCH 12/17] Revert "drm/amd/display: Fix green screen issue after suspend"

This reverts commit 87b7ebc2e16c14d32a912f18206a4d6cc9abc3e8. A long time ago, we had an issue with the Raven system when it was connected to two displays: one with DP and another with HDMI. After the system woke up from suspension, we saw a solid green screen caused by an underflow generated by b

[PATCH 13/17] drm/amd/display: Re-validate streams on commit_streams

From: Dillon Varone To prevent invalid HW programming, streams should be revalidated first before committing to HW. Reviewed-by: Aric Cyr Signed-off-by: Dillon Varone Signed-off-by: Rodrigo Siqueira --- drivers/gpu/drm/amd/display/dc/core/dc.c | 5 + 1 file changed, 5 insertions(+) diff

[PATCH 14/17] drm/amd/display: Block Invalid TMDS operation

From: Chris Park [Why] When sink type is TMDS, PHY programming does not block against pixel clock greater than 600MHz. [How] Based on sink type, block greater than 600MHz phy programming. Reviewed-by: Aric Cyr Signed-off-by: Chris Park Signed-off-by: Dillon Varone Signed-off-by: Rodrigo Siqu

[PATCH 15/17] drm/amd/display: Don't allow IPS2 in D0 for RCG Dynamic

From: Nicholas Kazlauskas [Why] The existing changes to the DPMS off flag should help reduce accidental entry, but this change further restricts the entry condition. [How] Record last power state as sent to DMUB. Don't send IPS2 allow if it's D0. Reviewed-by: Leo Chen Signed-off-by: Nicholas K

[PATCH 16/17] drm/amd/display: Disable MPC rate control on ODM pipe update

From: George Shen [Why] Seamless boot skips MPC init for the active pipe, resulting in stale MPC rate control state being retained. This will cause issues since other logic assumes it is disabled (as DCN30 and newer does not need it). [How] Disable MPC rate control on ODM pipe update to cover th

[PATCH 11/17] drm/amd/display: Fix uninitialized variables in amdgpu_dm_debugfs

From: Alex Hung [WHAT] Some fields in struct dc_link_settings and link_training_settings are not initialized and using them can cause unexpected results. [HOW] Initialize struct dc_link_settings and link_training_settings to zero. Reviewed-by: Rodrigo Siqueira Signed-off-by: Alex Hung Signed-

[PATCH 17/17] drm/amd/display: 3.2.314

From: Aric Cyr DC 3.2.314 contains some improvements as summarized below: * Update DML21 code. * Fixes for FAMS2 interface. * HDMI fixes. * Compilation warning fixes. Signed-off-by: Aric Cyr Acked-by: Rodrigo Siqueira Signed-off-by: Rodrigo Siqueira --- drivers/gpu/drm/amd/display/dc/dc.h |

Re: [PATCH 1/1] drm/amdgpu: Use device wedged event

On 12/13/2024 12:39 AM, André Almeida wrote: > Use DRM's device wedged event to notify userspace that a reset had > happened. For now, only use `none` method meant for telemetry > capture. > > Signed-off-by: André Almeida > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 +++ > 1 file ch