From: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>

[Why]
The existing changes to the DPMS off flag should help reduce accidental
entry, but this change further restricts the entry condition.

[How]
Record last power state as sent to DMUB.
Don't send IPS2 allow if it's D0.

Reviewed-by: Leo Chen <leo.c...@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlaus...@amd.com>
Signed-off-by: Rodrigo Siqueira <rodrigo.sique...@amd.com>
---
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 5 ++++-
 drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 1 +
 2 files changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c 
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
index 44ff9abe2880..cbe63a870492 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c
@@ -1313,7 +1313,8 @@ static void dc_dmub_srv_notify_idle(const struct dc *dc, 
bool allow_idle)
                        new_signals.bits.allow_ips2 = 1;
                } else if (dc->config.disable_ips == 
DMUB_IPS_RCG_IN_ACTIVE_IPS2_IN_OFF) {
                        /* TODO: Move this logic out to hwseq */
-                       if (count_active_streams(dc) == 0) {
+                       if (dc_dmub_srv->last_power_state == 
DC_ACPI_CM_POWER_STATE_D3 &&
+                           count_active_streams(dc) == 0) {
                                /* IPS2 - Display off */
                                new_signals.bits.allow_pg = 1;
                                new_signals.bits.allow_ips1 = 1;
@@ -1517,6 +1518,8 @@ void dc_dmub_srv_notify_fw_dc_power_state(struct 
dc_dmub_srv *dc_dmub_srv,
        }
 
        dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, 
DM_DMUB_WAIT_TYPE_WAIT);
+
+       dc_dmub_srv->last_power_state = power_state;
 }
 
 bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv)
diff --git a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h 
b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
index 10b48198b7a6..4763e652c9c7 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h
@@ -56,6 +56,7 @@ struct dc_dmub_srv {
        union dmub_shared_state_ips_driver_signals driver_signals;
        bool idle_allowed;
        bool needs_idle_wake;
+       enum dc_acpi_cm_power_state last_power_state;
 };
 
 void dc_dmub_srv_wait_idle(struct dc_dmub_srv *dc_dmub_srv);
-- 
2.45.2

Reply via email to