From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower address mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
On 11/19/2024 9:07 PM, Yuan Feng wrote:
> On SRIOV, guest driver and host driver might deploy different versions
> of MEC firmware binaries that lead to potential compability issues cause
> system hang. To solve this, host and guest deploy MEC fw with two level jump
> table.
>
> Signed-off-by:
From: Alex Deucher
Now that all of the IP specific code has been moved into
the IP specific functions, we can make this code generic.
V2: Fixed build errors and porting logics (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/Makefile
From: Arunpravin Paneer Selvam
- Add a field in struct amdgpu_mqd_prop for userqueue
secure sem fence address since now we have a generic
file for mes_userqueue.c
- Add secure sem fence address mqd support to gfx12 into
their corresponding init functions.
- Enable secure semaphore IRQ handl
From: Alex Deucher
This can all be handled by in the IP specific mpd init
code.
V2: Removed setting of gds_va, which was removed during UAPI
review (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
.../gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c | 83 ---
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower offset mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower address mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower address mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower address (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower offset mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
From: Alex Deucher
This can all be handled by in the IP specific mpd init
code.
V2: Removed setting of gds_va, which was removed during UAPI
review (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
.../gpu/drm/amd/amdgpu/mes_v11_0_userqueue.c | 83 ---
From: Alex Deucher
These are needed for user queues.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index fa30c78f830e..2c889cc2a59e 100644
---
From: Arunpravin Paneer Selvam
- Add a field in struct amdgpu_mqd_prop for userqueue
secure sem fence address since now we have a generic
file for mes_userqueue.c
- Add secure sem fence address mqd support to gfx12 into
their corresponding init functions.
- Enable secure semaphore IRQ handl
This patch series adds code to support Usermode queue on Navi 4X.
Most of the base usermode queue code (for Navi 3X) is already merged
into amd-staging-drm-next, this patch series does some clean-up to make
this code generic and reuse the existing framework for Navi 4X as well.
Alex Deucher (7):
On 11/21/2024 9:22 AM, Felix Kuehling wrote:
On 2024-11-20 22:58, Chen, Xiaogang wrote:
@@ -1822,15 +1804,20 @@ struct kfd_process *kfd_lookup_process_by_pasid(u32
pasid)
{
struct kfd_process *p, *ret_p = NULL;
unsigned int temp;
+int i;
int idx = srcu_read_l
On 21/11/2024 16:19, Christian König wrote:
Am 21.11.24 um 14:10 schrieb Shashank Sharma:
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower offset mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
Am 21.11.24 um 18:37 schrieb Sunil Khatri:
Fix the variable name in comments to clean up the
warning in amdgpu_bo_create_isp_user.
warning: Function parameter or struct member 'dbuf' not described in
'amdgpu_bo_create_isp_user'
warning: Excess function parameter 'dma_buf' description in
'amdgp
On 11/22/2024 1:20 PM, Christian König wrote:
Am 21.11.24 um 18:37 schrieb Sunil Khatri:
Fix the variable name in comments to clean up the
warning in amdgpu_bo_create_isp_user.
warning: Function parameter or struct member 'dbuf' not described in
'amdgpu_bo_create_isp_user'
warning: Excess fu
[AMD Official Use Only - AMD Internal Distribution Only]
Ok, thank you!
Regards,
Shikang.
From: Koenig, Christian
Sent: Thursday, November 21, 2024 4:12 PM
To: Fan, Shikang ; amd-gfx@lists.freedesktop.org
Cc: Deng, Emily
Subject: Re: [PATCH v3] drm/amdgpu: Ch
Am 14.11.24 um 02:46 schrieb vitaly.pros...@amd.com:
From: Vitaly Prosyak
[ +0.21] BUG: KASAN: slab-use-after-free in
drm_sched_entity_flush+0x6cb/0x7a0 [gpu_sched]
[ +0.27] Read of size 8 at addr 8881b8605f88 by task
amd_pci_unplug/2147
[ +0.23] CPU: 6 PID: 2147 Comm: amd
On 11/14/2024 3:14 AM, Alex Deucher wrote:
> Split the code on a per instance basis. This will allow
> us to use the per instance functions in the future to
> handle more things per instance.
>
> Signed-off-by: Alex Deucher
> ---
> drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c | 841 +---
Yeah, just wanted to point out the unused variable as well.
With that fixed the patch is Reviewed-by: Christian König
Regards,
Christian.
Am 21.11.24 um 07:49 schrieb Fan, Shikang:
[AMD Official Use Only - AMD Internal Distribution Only]
I forgot to delete the unused counter "j" from the
From: Somalapuram Amaranath
This patch enables Usermode queue support across GFX, Compute
and SDMA IPs on GFX12/SDMA7. It typically reuses Navi3X userqueue
IP functions to create and destroy MQDs.
v2: rebase on proposed changes (Alex)
Cc: Alex Deucher
Cc: Christian Koenig
Cc: Arvind Yadav
Si
Am 21.11.24 um 16:22 schrieb Felix Kuehling:
On 2024-11-20 22:58, Chen, Xiaogang wrote:
@@ -1822,15 +1804,20 @@ struct kfd_process *kfd_lookup_process_by_pasid(u32
pasid)
{
struct kfd_process *p, *ret_p = NULL;
unsigned int temp;
+int i;
int idx = srcu_read_lock
Am 21.11.24 um 14:10 schrieb Shashank Sharma:
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower offset mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +++
1 file changed, 3 insertions(+)
dif
On 2024-11-20 22:58, Chen, Xiaogang wrote:
>>> @@ -1822,15 +1804,20 @@ struct kfd_process
>>> *kfd_lookup_process_by_pasid(u32 pasid)
>>> {
>>> struct kfd_process *p, *ret_p = NULL;
>>> unsigned int temp;
>>> +int i;
>>> int idx = srcu_read_lock(&kfd_processes_srcu);
On 11/11/2024 12:09, Thomas Weißschuh wrote:
The value of "min_input_signal" returned from ATIF on a Framework AMD 13
is "12". This leads to a fairly bright minimum display backlight.
Introduce a quirk to override "min_input_signal" to "0" which leads to a
much lower minimum brightness, which is
On Wed, Nov 20, 2024 at 11:57 PM Lazar, Lijo wrote:
>
>
>
> On 11/20/2024 11:58 PM, Alex Deucher wrote:
> > smu->workload_mask is IP specific and should not be messed with in
> > the common code. The mask bits vary across SMU versions.
> >
> > Move all handling of smu->workload_mask in to the back
On 11/21/2024 7:58 PM, Alex Deucher wrote:
> On Wed, Nov 20, 2024 at 11:57 PM Lazar, Lijo wrote:
>>
>>
>>
>> On 11/20/2024 11:58 PM, Alex Deucher wrote:
>>> smu->workload_mask is IP specific and should not be messed with in
>>> the common code. The mask bits vary across SMU versions.
>>>
>>> Mo
This patch series adds code to support Usermode queue on GFX12.
Most of the base usermode queue code (for Navi 3X) is already merged
into amd-staging-drm-next, this patch series does some clean-up to make
this code generic and reuse the existing framework for GFX12 as well.
Alex Deucher (7):
dr
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower address (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
From: Somalapuram Amaranath
This patch enables Usermode queue support across GFX, Compute
and SDMA IPs on GFX12/SDMA7. It typically reuses Navi3X userqueue
IP functions to create and destroy MQDs.
v2: rebase on proposed changes (Alex)
Cc: Alex Deucher
Cc: Christian Koenig
Cc: Arvind Yadav
Si
From: Alex Deucher
Set the addresses for the UQ metadata.
V2: Fix lower address mask (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
From: Alex Deucher
These are needed for user queues.
Signed-off-by: Alex Deucher
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index fa30c78f830e..2c889cc2a59e 100644
---
Applied. Thanks!
Alex
On Tue, Nov 19, 2024 at 4:02 PM Christophe JAILLET
wrote:
>
> In case of error after a amdgpu_gfx_rlc_enter_safe_mode() call, it is not
> balanced by a corresponding amdgpu_gfx_rlc_exit_safe_mode() call.
>
> Add the missing call.
>
> Fixes: 9b7b8154cdb8 ("drm/amd/powerplay
From: Alex Deucher
Now that all of the IP specific code has been moved into
the IP specific functions, we can make this code generic.
V2: Fixed build errors and porting logics (Shashank)
Signed-off-by: Alex Deucher
Signed-off-by: Shashank Sharma
---
drivers/gpu/drm/amd/amdgpu/Makefile
Hi Gregory,
Please report a bug on https://gitlab.freedesktop.org/drm/amd/, and it
will ask essential information for debugging when creating bugs. Thanks.
On 11/18/24 21:25, Gregory Carter wrote:
Nov 18 18:37:33.973691 discernment.aesgi.com discernment.aesgi.com> kernel: warning: `QSampleCach
add vcn_v4_0_set_clockgating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v5_0_0_set_clockgating_state'
warning: Excess function parameter 'handle' description in
'vcn_v5_0
add vcn_v4_0_3_set_powergating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v4_0_3_set_powergating_state'
warning: Excess function parameter 'handle' description in
'vcn_v4
*** BLURB HERE ***
Sunil Khatri (8):
drm/amdgpu: Fix comment for vcn_v4_0_set_clockgating_state
drm/amdgpu: Fix comment for vcn_v5_0_0_set_clockgating_state
drm/amdgpu: Fix comment for vcn_v4_0_3_set_powergating_state
drm/amdgpu: Fix comment for vcn_v4_0_5_set_clockgating_state
drm/amdgp
add vcn_v4_0_3_set_clockgating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v4_0_3_set_clockgating_state'
warning: Excess function parameter 'handle' description in
'vcn_v4
add vcn_v4_0_set_powergating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v4_0_set_powergating_state'
warning: Excess function parameter 'handle' description in
'vcn_v4_0_s
add vcn_v4_0_5_set_clockgating_state ip_block comment and
clean up the argument "handle" comment.
comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v4_0_5_set_clockgating_state'
warning: Excess function parameter 'handle' description in
add vcn_v4_0_5_set_powergating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v4_0_5_set_powergating_state'
warning: Excess function parameter 'handle' description in
'vcn_v4
On 11/18/2024 14:03, Mario Limonciello wrote:
As part of the suspend sequence VRAM needs to be evicted on dGPUs.
In order to make suspend/resume more reliable we moved this into
the pmops prepare() callback so that the suspend sequence would fail
but the system could remain operational under high
On Thu, Nov 21, 2024 at 8:33 AM Shashank Sharma wrote:
>
> From: Arunpravin Paneer Selvam
>
> - Add a field in struct amdgpu_mqd_prop for userqueue
> secure sem fence address since now we have a generic
> file for mes_userqueue.c
> - Add secure sem fence address mqd support to gfx12 into
>
add "restore" missing variable in the fucntions
sdma_v4_4_2_page_resume and sdma_v4_4_2_inst_start.
This fixes the warning:
warning: Function parameter or struct member 'restore' not described in
'sdma_v4_4_2_page_resume'
warning: Function parameter or struct member 'restore' not described in
's
Fix the variable name in comments to clean up the
warning in amdgpu_bo_create_isp_user.
warning: Function parameter or struct member 'dbuf' not described in
'amdgpu_bo_create_isp_user'
warning: Excess function parameter 'dma_buf' description in
'amdgpu_bo_create_isp_user'
Signed-off-by: Sunil K
On 11/20/2024 5:55 PM, Felix Kuehling wrote:
On 2024-11-12 12:25, Xiaogang.Chen wrote:
From: Xiaogang Chen
To have user better understand the causes triggering runlist oversubscription.
No function change.
Signed-off-by: Xiaogang chenxiaogang.c...@amd.com
---
.../gpu/drm/amd/amdkfd/kfd_pac
add vcn_v5_0_0_set_powergating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v5_0_0_set_powergating_state'
warning: Excess function parameter 'handle' description in
'vcn_v5
AMD gfx1103/M780 iGPU will crash eventually while performing
pytorch ML/AI operations on rocm sdk stack. Crash causes linux
desktop randomly either to recover after killing the app,
freeze the desktop or reset back to login screen.
Easy way to trigger the problem is to build the the
ML/AI support
add vcn_v4_0_set_clockgating_state ip_block comment and
clean up the argument "handle" comment.
This fixes the warning:
warning: Function parameter or struct member 'ip_block' not described in
'vcn_v4_0_set_clockgating_state'
warning: Excess function parameter 'handle' description in
'vcn_v4_0_s
[AMD Official Use Only - AMD Internal Distribution Only]
Hi Lyude, Jani, Imre, Simona:
Please kindly review the patch series at your convenient time. Thanks.
Regards,
Jerry
> -Original Message-
> From: Fangzhi Zuo
> Sent: Friday, November 8, 2024 12:42 PM
> To: dri-de...@lists.fre
On Thu, Nov 21, 2024 at 8:42 AM Shashank Sharma wrote:
>
> From: Alex Deucher
>
> Set the addresses for the UQ metadata.
>
> V2: Fix lower offset mask (Shashank)
>
> Signed-off-by: Alex Deucher
> Signed-off-by: Shashank Sharma
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c | 3 +++
> 1 file ch
On Thu, Nov 21, 2024 at 8:42 AM Shashank Sharma wrote:
>
> From: Alex Deucher
>
> Set the addresses for the UQ metadata.
>
> V2: Fix lower address mask (Shashank)
>
> Signed-off-by: Alex Deucher
> Signed-off-by: Shashank Sharma
> ---
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 3 +++
> 1 file c
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