Due to electrical and mechanical constraints in certain platform designs there
may be likely interference of relatively high-powered harmonics of the (G-)DDR
memory clocks with local radio module frequency bands used by Wifi 6/6e/7. To
mitigate possible RFI interference we introuduced WBRF(Wifi Ban
Add documentation about AMD's Wifi band RFI mitigation (WBRF) mechanism
explaining the theory and how it is used.
Signed-off-by: Ma Jun
---
Documentation/driver-api/wbrf.rst | 76 +++
1 file changed, 76 insertions(+)
create mode 100644 Documentation/driver-api/wbrf.r
Due to electrical and mechanical constraints in certain platform designs
there may be likely interference of relatively high-powered harmonics of
the (G-)DDR memory clocks with local radio module frequency bands used
by Wifi 6/6e/7.
To mitigate this, AMD has introduced a mechanism that devices can
From: Evan Quan
The newly added WBRF feature needs this interface for channel
width calculation.
Signed-off-by: Ma Jun
Signed-off-by: Evan Quan
--
v8->v9:
- correct typo(Mhz -> MHz) (Johnson)
v13:
- Fix the format issue (IIpo Jarvinen)
---
include/net/cfg80211.h | 9 +
net/wireles
From: Evan Quan
To support the WBRF mechanism, Wifi adapters utilized in the system must
register the frequencies in use (or unregister those frequencies no longer
used) via the dedicated calls. So that, other drivers responding to the
frequencies can take proper actions to mitigate possible inte
From: Evan Quan
Add those data structures to support Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
Signed-off-by: Ma Jun
v13:
- Move some struct variables to amdgpu_smu.h to reduce
duplicate code
---
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
From: Evan Quan
With WBRF feature supported, as a driver responding to the frequencies,
amdgpu driver is able to do shadow pstate switching to mitigate possible
interference(between its (G-)DDR memory clocks and local radio module
frequency bands used by Wifi 6/6e/7).
Signed-off-by: Evan Quan
R
From: Evan Quan
To protect PMFW from being overloaded.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 29 +++
drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h | 7 +
2 files changed, 30 inser
Fulfill the SMU13.0.0 support for Wifi RFI mitigation feature.
Co-developed-by: Evan Quan
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
Signed-off-by: Ma Jun
--
v10->v11:
- downgrade the prompt level on message failure(Lijo)
v13:
- Fix the format issue (IIpo Jarvinen)
- Move funct
From: Evan Quan
Fulfill the SMU13.0.7 support for Wifi RFI mitigation feature.
Signed-off-by: Evan Quan
Reviewed-by: Mario Limonciello
Signed-off-by: Ma Jun
--
v10->v11:
- downgrade the prompt level on message failure(Lijo)
v13:
- Fix the format issue (IIpo Jarvinen)
- Remove duplicate co
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: Ma, Jun
Sent: Monday, October 30, 2023 2:50 PM
To: Wang, Yang(Kevin) ; Ma, Jun ;
amd-gfx@lists.freedesktop.org; Feng, Kenneth ; Deucher,
Alexander
Cc: Ma, Jun
Subject: Re: [PATCH Resend] drm/amd/pm: only check srio
Am 27.10.23 um 18:58 schrieb Rob Clark:
From: Rob Clark
In cases where the # is known ahead of time, it is silly to do the table
resize dance.
Ah, yes that was my initial implementation as well, but I ditched that
because nobody actually used it.
One comment below.
Signed-off-by: Rob Cl
Am 28.10.23 um 00:39 schrieb Felix Kuehling:
Make restore workers freezable so we don't have to explicitly flush them
in suspend and GPU reset code paths, and we don't accidentally try to
restore BOs while the GPU is suspended. Not having to flush restore_work
also helps avoid lock/fence dependen
This patch addresses the following warning spotted by
using coccinelle where the case checked does the same
than the else case.
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c:4664:8-10:
WARNING: possible condition with no effect (if == else)
Signed-off-by: José Pekkarinen
-
On 2023-10-27 20:55, Deucher, Alexander wrote:
[Public]
-Original Message-
From: José Pekkarinen
Sent: Friday, October 27, 2023 12:59 PM
To: Deucher, Alexander ; Koenig, Christian
; Pan, Xinhui ;
sk...@linuxfoundation.org
Cc: José Pekkarinen ; airl...@gmail.com;
dan...@ffwll.ch; amd-gf
Spotted by coccicheck, there is a redundant check for
v->SourcePixelFormat[k] != dm_444_16. This patch will
remove it. The corresponding output follows.
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:5130:86-122:
duplicated argument to && or ||
Signed-off-by: José Pekkarinen
---
Hello,
On Fri, Oct 27, 2023 at 11:57:45AM -0400, Hamza Mahfooz wrote:
> On 10/27/23 11:55, Lakha, Bhawanpreet wrote:
> > [AMD Official Use Only - General]
> >
> >
> >
> > There was a consensus to use memset instead of {0}. I remember making
> > changes related to that previously.
>
> Hm, seems
For IMU enabled APUs, after sending the PrepareMp1ForUnload message
to SMU in system_features_control, the RLC registers can't be touched.
The driver to stop the rlc in suspending is no longer required.
Signed-off-by: Tim Huang
---
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c | 1 +
1 file changed,
The kfd_resume needs to touch GC registers to enable the interrupts,
it needs to be done before GFXOFF is enabled to ensure that the GFX is
not off and GC registers can be touched. So move kfd_resume before the
amdgpu_device_ip_late_init which enables the CGPG/GFXOFF.
Signed-off-by: Tim Huang
---
GFX doorbell range should be set after flr otherwise the gfx doorbell
range will be overlap with MEC.
v2: remove "amdgpu_sriov_vf" and "amdgpu_in_reset" check, and add grbm
select for the case of 2 gfx rings.
Signed-off-by: Lin.Cao
---
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 7 +++
1 file
Update driver if headers and metrics table in smu v14_0_0 after smu fw
promotion. And drop the legacy metrics table.
v1:
update header files
v2:
drop legacy metrics table and add warning of checking pmfw version.
Signed-off-by: Li Ma
---
.../gpu/drm/amd/include/kgd_pp_interface.h| 30 +-
.
If the size returned by drm buddy allocator is higher than
the required size, we take the higher size to calculate
the buffer start address. This is required if we couldn't
trim the buffer to the requested size. This will fix the
display corruption issue on APU's which has limited VRAM
size.
gitla
On Mon, Oct 30, 2023 at 1:05 AM Christian König
wrote:
>
> Am 27.10.23 um 18:58 schrieb Rob Clark:
> > From: Rob Clark
> >
> > In cases where the # is known ahead of time, it is silly to do the table
> > resize dance.
>
> Ah, yes that was my initial implementation as well, but I ditched that
> be
On 10/29/2023 8:44 AM, José Pekkarinen wrote:
This patch addresses the following warning spotted by
using coccinelle where the case checked does the same
than the else case.
drivers/gpu/drm/amd/display/dc/dml/dcn32/display_mode_vba_util_32.c:4664:8-10:
WARNING: possible condition with no eff
On 10/29/2023 5:39 AM, José Pekkarinen wrote:
Spotted by coccicheck, there is a redundant check for
v->SourcePixelFormat[k] != dm_444_16. This patch will
remove it. The corresponding output follows.
drivers/gpu/drm/amd/display/dc/dml/dcn30/display_mode_vba_30.c:5130:86-122: duplicated
argume
[AMD Official Use Only - General]
This series is :
Reviewed-by: Yifan Zhang
-Original Message-
From: Huang, Tim
Sent: Monday, October 30, 2023 4:37 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher, Alexander ; Zhang, Yifan
; Huang, Tim
Subject: [PATCH 2/2] drm/amdgpu: move kfd_resume
On 2023-10-30 4:23, Christian König wrote:
Am 28.10.23 um 00:39 schrieb Felix Kuehling:
Make restore workers freezable so we don't have to explicitly flush them
in suspend and GPU reset code paths, and we don't accidentally try to
restore BOs while the GPU is suspended. Not having to flush resto
Am 28.10.23 um 02:48 schrieb Yuran Pereira:
Hello,
On Fri, Oct 27, 2023 at 11:57:45AM -0400, Hamza Mahfooz wrote:
On 10/27/23 11:55, Lakha, Bhawanpreet wrote:
[AMD Official Use Only - General]
There was a consensus to use memset instead of {0}. I remember making
changes related to that previ
Hi Sagar,
First of all, thanks for your patch.
On 10/25/23 08:04, Sagar Vashnav wrote:
Add kernel documentation for the dc_stream_forward_crc_window
Signed-off-by: Sagar Vashnav
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/
Am 30.10.23 um 14:38 schrieb Rob Clark:
On Mon, Oct 30, 2023 at 1:05 AM Christian König
wrote:
Am 27.10.23 um 18:58 schrieb Rob Clark:
From: Rob Clark
In cases where the # is known ahead of time, it is silly to do the table
resize dance.
Ah, yes that was my initial implementation as well, b
Am 30.10.23 um 13:22 schrieb Arunpravin Paneer Selvam:
If the size returned by drm buddy allocator is higher than
the required size, we take the higher size to calculate
the buffer start address. This is required if we couldn't
trim the buffer to the requested size. This will fix the
display c
Am 30.10.23 um 16:16 schrieb Felix Kuehling:
On 2023-10-30 4:23, Christian König wrote:
Am 28.10.23 um 00:39 schrieb Felix Kuehling:
Make restore workers freezable so we don't have to explicitly flush
them
in suspend and GPU reset code paths, and we don't accidentally try to
restore BOs while
On 2023-10-30 12:26, José Pekkarinen wrote:
On 2023-10-30 15:52, Aurabindo Pillai wrote:
On 10/29/2023 8:44 AM, José Pekkarinen wrote:
This patch addresses the following warning spotted by
using coccinelle where the case checked does the same
than the else case.
drivers/gpu/drm/amd/display/
On 2023-10-30 12:16, Christian König wrote:
@@ -1904,6 +1906,19 @@ kfd_process_gpuid_from_node(struct
kfd_process *p, struct kfd_node *node,
return -EINVAL;
}
+static void signal_eviction_fence(struct kfd_process *p)
+{
+ spin_lock(&p->ef_lock);
+ if (!p->ef)
+ goto unlock
Am 30.10.23 um 18:38 schrieb Felix Kuehling:
On 2023-10-30 12:16, Christian König wrote:
@@ -1904,6 +1906,19 @@ kfd_process_gpuid_from_node(struct
kfd_process *p, struct kfd_node *node,
return -EINVAL;
}
+static void signal_eviction_fence(struct kfd_process *p)
+{
+ spin_lock(&p
On 2023-10-30 13:48, Christian König wrote:
Am 30.10.23 um 18:38 schrieb Felix Kuehling:
On 2023-10-30 12:16, Christian König wrote:
@@ -1904,6 +1906,19 @@ kfd_process_gpuid_from_node(struct
kfd_process *p, struct kfd_node *node,
return -EINVAL;
}
+static void signal_eviction_fence
Am 30.10.23 um 18:56 schrieb Felix Kuehling:
On 2023-10-30 13:48, Christian König wrote:
Am 30.10.23 um 18:38 schrieb Felix Kuehling:
On 2023-10-30 12:16, Christian König wrote:
@@ -1904,6 +1906,19 @@ kfd_process_gpuid_from_node(struct
kfd_process *p, struct kfd_node *node,
return -EI
On Mon, Oct 30, 2023 at 9:01 AM Christian König
wrote:
>
> Am 30.10.23 um 14:38 schrieb Rob Clark:
> > On Mon, Oct 30, 2023 at 1:05 AM Christian König
> > wrote:
> >> Am 27.10.23 um 18:58 schrieb Rob Clark:
> >>> From: Rob Clark
> >>>
> >>> In cases where the # is known ahead of time, it is sill
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: c503e3eec382ac708ee7adf874add37b77c5d312 Add linux-next specific
files for 20231030
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202310052201.anvbpgpr-...@intel.com
https
[AMD Official Use Only - General]
Please drop v1: xxx line in comment.
W/ that fixed, this patch is:
Reviewed-by: Yifan Zhang
Best Regards,
Yifan
-Original Message-
From: amd-gfx On Behalf Of Li Ma
Sent: Monday, October 30, 2023 6:55 PM
To: amd-gfx@lists.freedesktop.org
Cc: Deucher,
Acked-by: ZhenGuo Yin
On 10/30/2023 5:57 PM, Lin.Cao wrote:
GFX doorbell range should be set after flr otherwise the gfx doorbell
range will be overlap with MEC.
v2: remove "amdgpu_sriov_vf" and "amdgpu_in_reset" check, and add grbm
select for the case of 2 gfx rings.
Signed-off-by: Lin.Cao
remove unused macro HW_REV
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index a2e8c2b60857..969d8ba8b8dc 100644
--- a/drivers/gpu/drm/amd/amdgpu/am
[AMD Official Use Only - General]
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Yang Wang
Sent: Tuesday, October 31, 2023 10:13 AM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Yang(Kevin)
Subject: [PATCH] drm/amdgpu: remove unused macro HW_REV
Caution: This m
correct following amdgpu ip block version information:
- gfx_v9_4_3
- sdma_v4_4_2
Signed-off-by: Yang Wang
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +-
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdg
The variable "chunk_ptr" should be a pointer pointing
to a struct drm_amdgpu_cs_chunk instead of to a pointer
of that.
Signed-off-by: YuanShang
---
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
b/
[AMD Official Use Only - General]
Reviewed-by: Kenneth Feng
-Original Message-
From: amd-gfx On Behalf Of Yang Wang
Sent: Tuesday, October 31, 2023 10:50 AM
To: amd-gfx@lists.freedesktop.org
Cc: Wang, Yang(Kevin)
Subject: [PATCH] drm/amdgpu: correct amdgpu ip block rev info
Caution:
dorp fw version check and using max table size to init table.
Signed-off-by: Li Ma
Reviewed-by: Yifan Zhang
---
.../gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c| 17 -
1 file changed, 4 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/vangogh_ppt.c
[AMD Official Use Only - General]
Reviewed-by: Yang Wang
Best Regards,
Kevin
-Original Message-
From: amd-gfx On Behalf Of Li Ma
Sent: Tuesday, October 31, 2023 11:23 AM
To: amd-gfx@lists.freedesktop.org
Cc: Zhang, Yifan ; Ma, Li ; Du, Xiaojian
Subject: [PATCH] drm/amd/swsmu: remove
On 10/28/2023 1:36 AM, Victor Lu wrote:
The WREG32/RREG32_SOC15_IP_NO_KIQ call is using XCC0's RLCG interface
when programming other XCCs.
Add xcc instance parameter to them.
v3: xcc not needed for MMMHUB
v2: rebase
Signed-off-by: Victor Lu
---
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
On 10/28/2023 1:41 AM, Victor Lu wrote:
amdgpu_virt_kiq_reg_write_reg_wait is hardcoded to use MEC engine 0.
Add xcc_inst as a parameter to allow it to use different MEC engines.
v3: use first xcc for MMHUB in gmc_v9_0_flush_gpu_tlb
v2: rebase
Signed-off-by: Victor Lu
---
drivers/gpu/drm
On 10/31/2023 7:42 AM, Yang Wang wrote:
remove unused macro HW_REV
Signed-off-by: Yang Wang
Reviewed-by: Lijo Lazar
Thanks,
Lijo
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
b/drivers/gpu/drm/amd/am
On 10/31/2023 8:20 AM, Yang Wang wrote:
correct following amdgpu ip block version information:
- gfx_v9_4_3
- sdma_v4_4_2
Signed-off-by: Yang Wang
Reviewed-by: Lijo Lazar
Thanks,
Lijo
---
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +-
drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 2 +
MACO only works if BACO is supported
Signed-off-by: Ma Jun
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 8
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c | 9 +
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/
[AMD Official Use Only - General]
Reviewed-by: Kenneth Feng
-Original Message-
From: Ma, Jun
Sent: Tuesday, October 31, 2023 1:43 PM
To: amd-gfx@lists.freedesktop.org; Feng, Kenneth ;
Deucher, Alexander
Cc: Ma, Jun
Subject: [PATCH] drm/amd/pm: Fix error of MACO flag setting code
MA
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